Want a longer, more detailed explanation of the oneAPI unified programming model? Here’s a 30-minute video

Last November at the Intel HPC Developer Conference, which was co-located with Supercomputing 2019 in Denver, Intel announced the oneAPI initiative plus a beta release of the Intel® oneAPI Toolkits and the associated Data Parallel C++ (DPC++) programming language that allows developers to target CPUs, GPUs, FPGAs, and other hardware accelerators with one source-code document. (See “Intel announces open oneAPI initiative and development beta release with Data Parallel C++ language for programming CPUs, GPUs, FPGAs, and other accelerators.”) The following day at that same conference, Bill Savage, Intel Vice President of Intel Architecture, Graphics and Software and General Manager for Compute Performance and Developer Products, gave a clear, extremely detailed, half-hour talk that explored the oneAPI programming model in significantly more technical depth.

Savage set up his talk with several questions including:

  • Is it possible to create a unified programming model for diverse processing architectures and hardware accelerators?
  • Is it possible to develop a programming language that can be used across these diverse processing architectures and hardware accelerators while still delivering programmer productivity and uncompromised performance?
  • Is there a set of APIs that can be adopted across the industry that will work for different processing hardware and even for hardware from different vendors?
  • Can all of this be done while interoperating with existing programming models?

 

That’s a big setup for a half-hour talk. If you’re lucky, you were there at the Intel HPC Developer Conference last November and saw Savage’s presentation. However, if you weren’t there, you’re still in luck because Intel has just posted a video of Savage’s talk on YouTube.

Here it is:

 

 

 

 

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Published on Categories Acceleration, oneAPITags ,
Steven Leibson

About Steven Leibson

Be sure to add the Intel Logic and Power Group to your LinkedIn groups. Steve Leibson is a Senior Content Manager at Intel. He started his career as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He’s served as Editor in Chief of EDN Magazine and Microprocessor Report and was the founding editor of Wind River’s Embedded Developers Journal. He has extensive design and marketing experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.