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Last November at the Intel HPC Developer Conference, which was co-located with Supercomputing 2019 in Denver, Intel announced the oneAPI initiative plus a beta release of the Intel® oneAPI Toolkits and the associated Data Parallel C++ (DPC++) programming language that allows developers to target CPUs, GPUs, FPGAs, and other hardware accelerators with one source-code document. (See “Intel announces open oneAPI initiative and development beta release with Data Parallel C++ language for programming CPUs, GPUs, FPGAs, and other accelerators.”) The following day at that same conference, Bill Savage, Intel Vice President of Intel Architecture, Graphics and Software and General Manager for Compute Performance and Developer Products, gave a clear, extremely detailed, half-hour talk that explored the oneAPI programming model in significantly more technical depth.
Savage set up his talk with several questions including:
That’s a big setup for a half-hour talk. If you’re lucky, you were there at the Intel HPC Developer Conference last November and saw Savage’s presentation. However, if you weren’t there, you’re still in luck because Intel has just posted a video of Savage’s talk on YouTube.
Here it is:
https://youtu.be/EtHCbKuivBA
Legal Notices and Disclaimers:
Intel technologies’ features and benefits depend on system configuration and may require enabled hardware, software or service activation. Performance varies depending on system configuration. No product or component can be absolutely secure. Check with your system manufacturer or retailer or learn more at intel.com.
Results have been estimated or simulated using internal Intel analysis, architecture simulation and modeling, and provided to you for informational purposes. Any differences in your system hardware, software or configuration may affect your actual performance.
Intel does not control or audit third-party data. You should review this content, consult other sources, and confirm whether referenced data are accurate.
Cost reduction scenarios described are intended as examples of how a given Intel- based product, in the specified circumstances and configurations, may affect future costs and provide cost savings.
Circumstances will vary. Intel does not guarantee any costs or cost reduction.
© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries.
Altera is a trademark of Intel Corporation or its subsidiaries.
Cyclone is a trademark of Intel Corporation or its subsidiaries.
Other names and brands may be claimed as the property of others.
Savage set up his talk with several questions including:
- Is it possible to create a unified programming model for diverse processing architectures and hardware accelerators?
- Is it possible to develop a programming language that can be used across these diverse processing architectures and hardware accelerators while still delivering programmer productivity and uncompromised performance?
- Is there a set of APIs that can be adopted across the industry that will work for different processing hardware and even for hardware from different vendors?
- Can all of this be done while interoperating with existing programming models?
That’s a big setup for a half-hour talk. If you’re lucky, you were there at the Intel HPC Developer Conference last November and saw Savage’s presentation. However, if you weren’t there, you’re still in luck because Intel has just posted a video of Savage’s talk on YouTube.
Here it is:
https://youtu.be/EtHCbKuivBA
Legal Notices and Disclaimers:
Intel technologies’ features and benefits depend on system configuration and may require enabled hardware, software or service activation. Performance varies depending on system configuration. No product or component can be absolutely secure. Check with your system manufacturer or retailer or learn more at intel.com.
Results have been estimated or simulated using internal Intel analysis, architecture simulation and modeling, and provided to you for informational purposes. Any differences in your system hardware, software or configuration may affect your actual performance.
Intel does not control or audit third-party data. You should review this content, consult other sources, and confirm whether referenced data are accurate.
Cost reduction scenarios described are intended as examples of how a given Intel- based product, in the specified circumstances and configurations, may affect future costs and provide cost savings.
Circumstances will vary. Intel does not guarantee any costs or cost reduction.
© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries.
Altera is a trademark of Intel Corporation or its subsidiaries.
Cyclone is a trademark of Intel Corporation or its subsidiaries.
Other names and brands may be claimed as the property of others.
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