Corning Announces 5G In-Building Network Collaboration with Intel using Intel® Xeon® Scalable processors, Intel® FlexRAN Reference Architecture, and Intel® FPGA PAC N3000 - Yesterday, Corning announced a collaborative effort with Intel to accelerate the availability of 5G communications within buildings. The collaboration will ultimately deliver a virtual platform for Corning’s 5G network solutions powered by Intel® Xeon® Scalable processors, based on the Intel® FlexRAN Reference Software Architecture, and incorporating the Intel® FPGA Programmable Acceleration Card (PAC) N3000 and...
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2nd Generation Intel® Hyperflex™ FPGA fabric in Intel® Agilex™ FPGAs boosts Fmax by as much as 40% and cuts power, also by as much as 40% - Along with the recent announcement of Intel® Agilex™ FPGAs, Intel also introduced the 2nd Generation Intel® Hyperflex™ FPGA fabric architecture. A new 27-minute video recently posted on the Intel FPGA channel on YouTube titled “Intel® Hyperflex™ Architecture Overview for Intel Agilex™ Devices” provides deeply detailed explanations of the many new features. Here are some highlights:...
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Free Webinar: Accelerate Cassandra NoSQL Database Performance using Intel® FPGA Programmable Acceleration Cards - rENIAC’s Distributed Data Engine accelerates Apache Cassandra NoSQL database performance by as much as an order of magnitude. It improves both throughput and latency for database transactions. Facebook originally developed the Apache Cassandra distributed NoSQL database to power its inbox search feature and released it to the open-source community more than a decade ago, where...
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THE LATEST
- Corning Announces 5G In-Building Network Collaboration with Intel using Intel® Xeon® Scalable processors, Intel® FlexRAN Reference Architecture, and Intel® FPGA PAC N3000 - Yesterday, Corning announced a collaborative effort with Intel to accelerate the availability of 5G communications within buildings. The collaboration will ultimately deliver a virtual platform for Corning’s 5G network solutions powered by Intel® Xeon® Scalable processors, based on the Intel® FlexRAN Reference Software Architecture, and incorporating the Intel® FPGA Programmable Acceleration Card (PAC) N3000 and...
read more - 2nd Generation Intel® Hyperflex™ FPGA fabric in Intel® Agilex™ FPGAs boosts Fmax by as much as 40% and cuts power, also by as much as 40% - Along with the recent announcement of Intel® Agilex™ FPGAs, Intel also introduced the 2nd Generation Intel® Hyperflex™ FPGA fabric architecture. A new 27-minute video recently posted on the Intel FPGA channel on YouTube titled “Intel® Hyperflex™ Architecture Overview for Intel Agilex™ Devices” provides deeply detailed explanations of the many new features. Here are some highlights:...
read more - Free Webinar: Accelerate Cassandra NoSQL Database Performance using Intel® FPGA Programmable Acceleration Cards - rENIAC’s Distributed Data Engine accelerates Apache Cassandra NoSQL database performance by as much as an order of magnitude. It improves both throughput and latency for database transactions. Facebook originally developed the Apache Cassandra distributed NoSQL database to power its inbox search feature and released it to the open-source community more than a decade ago, where...
read more 
New White Paper describes high-performance Next-Generation Core Networks Proof of Concept with FPGA-based NFV acceleration - Intel, Affirmed Networks, and Dell EMC describe a proof of concept for high-performance Next-Generation Core Networks (NGCN) in a new White Paper titled “Enabling Communications Service Providers to Meet 5G High Density I/O Goals through Software Optimization and Hardware Acceleration.” This White Paper describes a state-of-the-art solution for a commercial, standalone 5G core network (5GCN)...
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Handle one million IPSec SAs at 100 Gbps using Arrive Technologies’ IPSec core and the Intel® FPGA PAC N3000 card - Arrive Technologies’ FPGA-accelerated IP security (IPSec) IP core, optimized for the Intel® FPGA Programmable Acceleration Card (PAC) N3000, delivers wire-speed cryptographic processing (including AES-GCM (128/192/256), AES-CBC (128/192/256), SHA-1/2, and others) at Ethernet rates as fast as 100 Gbps while handling as many as one million Security Associations (SAs). With this sort of performance, Arrive’s IPSec...
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Network service providers and operators can serve many more customers with better throughput, lower TCO using Benu Networks’ vBNG with FPGA-based VNF acceleration - Network service providers and network operators perpetually face the challenge of reducing the costs associated with service delivery while also finding cost-effective ways to expand into new markets and serve an ever-growing number of subscribers while tailoring these services on a per-subscriber basis. Meeting these challenges requires a different approach and Benu Networks’ different approach...
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Free Intel and Napatech Webinar: Can Your Network Respond Quickly Enough to Defend Against Cyber Attacks? - Corporate data breaches cost many millions of dollars and they’re becoming more frequent as faster line rates make it easier for cybercriminals and other malicious actors to penetrate corporate and government networks with the intent of causing harm. Consequently, commercial firms, governments, and other entities are beefing up their network security. Network security hardware and...
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Alorium conjures a world of hardware-accelerated Arduino boards using Intel® MAX® 10 FPGAs - The open-source Arduino has become one of the most widely used embedded architectures for simple projects. The original Arduino boards were based on an 8-bit AVR microcontroller, originally developed by Atmel. The Arduino integrated development environment (IDE) and simplified programming “sketches” based on C++ made embedded programming easily accessible. Recognizing that Arduino code is not...
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Free Webinar: Ready to learn more about the new, faster, lower-power, 10nm Intel® Agilex™ FPGAs? - If you’re ready to learn more about the new 10nm Intel® Agilex™ FPGAs, Intel is conducting two free Webinars about the new devices. The two Webinars, taking place on October 22 and 23 respectively, are conveniently timed for Europe and North America. These Webinars will cover identical material and will discuss: How the new...
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Need lots of memory for your FPGA application? Intel® Agilex™ FPGAs have you covered. - Intel® Agilex™ FPGAs are designed to operate as many as four separate banks of 72-bit wide, DDR4 SDRAM memory at speeds to DDR4-3200 using the FPGA’s on-chip, hard memory controllers and hard memory transceiver ports (PHYs). Each of the Intel Agilex FPGA’s I/O banks combines 96 general-purpose I/O ports and a high-efficiency, hard memory controller....
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