Access leading edge Intel® FPGA Hardware and Software Development Tools for Free on the Intel® DevCloud - Now, you can get access to Intel® FPGA hardware and software development tools, for free, through a special program available on the Intel® DevCloud. These tools allow you to develop accelerated, programmable solutions and validate your workloads on leading FPGA hardware with tools optimized for Intel® technology. The program is open to Intel customers, partners,...
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Accelerating Memory Bound AI Inference Workloads with Intel® Stratix® 10 MX Devices - Artificial intelligence (AI) systems are increasingly constrained by memory solutions that overly constrict available memory bandwidth. For example, Recurrent Neural Networks (RNNs) used in AI applications such as finance, genome mapping, and speech AI – including Automatic Speech Recognition (ASR), Natural Language Processing/Understanding (NLP/NLU) – have two common traits: They are memory intensive They require...
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Free, 8-Hour, Instructor-Led, Virtual Class on Intel® Quartus® Prime Software helps Xilinx Vivado Design Suite users cross the great divide - If you have been using Xilinx Vivado Design Suite software and need to start designing with Intel® FPGAs to take advantage of the unique features or software in the broad silicon and software portfolio that Intel offers, would you like some help to speed your journey? There’s a new 8-hour, instructor-led, virtual class for you...
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THE LATEST
- Access leading edge Intel® FPGA Hardware and Software Development Tools for Free on the Intel® DevCloud - Now, you can get access to Intel® FPGA hardware and software development tools, for free, through a special program available on the Intel® DevCloud. These tools allow you to develop accelerated, programmable solutions and validate your workloads on leading FPGA hardware with tools optimized for Intel® technology. The program is open to Intel customers, partners,...
read more - Accelerating Memory Bound AI Inference Workloads with Intel® Stratix® 10 MX Devices - Artificial intelligence (AI) systems are increasingly constrained by memory solutions that overly constrict available memory bandwidth. For example, Recurrent Neural Networks (RNNs) used in AI applications such as finance, genome mapping, and speech AI – including Automatic Speech Recognition (ASR), Natural Language Processing/Understanding (NLP/NLU) – have two common traits: They are memory intensive They require...
read more - Free, 8-Hour, Instructor-Led, Virtual Class on Intel® Quartus® Prime Software helps Xilinx Vivado Design Suite users cross the great divide - If you have been using Xilinx Vivado Design Suite software and need to start designing with Intel® FPGAs to take advantage of the unique features or software in the broad silicon and software portfolio that Intel offers, would you like some help to speed your journey? There’s a new 8-hour, instructor-led, virtual class for you...
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Hot Chips 2020 Conference (August 16-18) announces program including several Intel presentations covering server and mobile processors, FPGAs, quantum computing, and a Jim Keller keynote - Do you need to keep up with the latest developments in processor, chip architecture, semiconductor, and advanced computing technology? The annual Hot Chips conference has been the place to surf technology’s leading edge for the last 30 years – and this year is no exception. At this year’s Hot Chips conference, now scheduled for August...
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The iAbra PathWorks toolkit brings embedded AI inference, real-time video recognition to the edge with Intel® Arria® 10 FPGAs, Intel® Xeon® Gold CPUs, and Intel® Atom® processors - It’s not always easy to get data to the cloud. Multi-stream computer vision applications, for example, are extremely data intensive and can overwhelm even 5G networks. A company named iAbra has created tools that build neural networks that run on FPGAs in real time, so that inference can be carried out at the edge in...
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Arrow Electronics™ develops four complete RF reference platforms based on the Intel® Arria® 10 SoC FPGA and Analog Devices high-speed RF transceivers, ADCs, and DACs - The JESD204B serial interface has become the interface standard of choice for high-speed analog-to-digital and digital-to-analog converters (ADCs and DACs). Intel® FPGAs and Intel® SOC FPGAs are well suited to interface to these converters using this interface and Arrow Electronics™ has developed four JESD204B reference solutions using high-speed analog RF transceivers and converter modules based...
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IEEE 802.1 TSN IP and software from TTTech Industrial now available packaged with selected Cyclone® V SoC FPGAs - Time Sensitive Networking (TSN) is the IEEE 802.1 standard for deterministic packet transmission and handling over Ethernet networks. It is a set of evolving IEEE standards that support a mix of deterministic, real-time and best-effort traffic over fast Ethernet connections; provides precise time synchronization of network nodes using synchronized, distributed local clocks; and serves as...
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Learn how to use Intel® FPGAs in critical Functional Safety applications: two free on-demand training Webinars - Designs with formal functional safety requirements in markets such as industrial automation, transportation, the smart grid, automotive, military, aerospace, and medical require highly reliable systems that are certified to comply with established safety standards such as IEC 61508 and ISO 13849. Design challenges for such systems include: Adopting quality management standards and implementing a “safe”...
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Interested in using Intel® oneAPI Toolkit with FPGAs to accelerate your code? Free 6-hour Webinar. Register now - Intel® oneAPI Beta Toolkits will deliver uncompromised software performance for diverse workloads across multiple architectures, including Intel® CPUs and Intel® FPGAs, using Data Parallel C++ (DPC++). You can learn how to use these powerful new software-development tools in a free, 6-hour Webinar being held on May 19. This course will teach you how to use...
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Ciena leverages Intel technology for flexibility and programmability to accelerate the adoption of O-RAN in 5G New Radio (NR) and Next-Generation LTE. - Ciena recently announced three new xHaul (fronthaul, midhaul, and backhaul) routers – the multivendor interoperable Ciena 5164, 5166, and 5168 Routers – as described in a new Ciena blog written by Brian Lavallée, Senior Director of Portfolio Marketing at Ciena. Mobile networks use the xHaul transport networks discussed in Lavallée’s blog to interconnect cell sites...
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