Intel® Agilex™ FPGAs and SoCs give you more interface capabilities for external memories than ever before. Two new, free, 1-hour Webinars provide an overview of the extensive external-memory interfacing capabilities of Intel Agilex FPGA and SoC families and will show you how to integrate different external memory interfaces into your design, including ways to take advantage of resource sharing within the Intel Agilex devices to implement multiple interfaces.
The Webinar dates and times are:
- January 16, 9:00 AM to 10:00 AM PT (Pacific Time)
- January 21, 10:00 AM to 11:00 AM CET (Central European Time)
The Webinars will be conducted by Steven Strell, an Applications Engineer with the Intel Programmable Solutions Group.
- Click here to register for the January 16 Webinar.
- Click here to register for the January 21 Webinar.
For more information on Intel Agilex FPGAs and SoCs, see:
- Intel Driving Data-Centric World with New 10nm Intel Agilex FPGA Family
- Intel® Agilex™ FPGAs Deliver a Game Changing Combination for the Data Centric World
For more detailed technical information on the external memory interface capabilities of Intel Agilex FPGAs and SoCs, start here.
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