Talk to PCIe Gen4 x16, Intel® UPI, Intel® Optane™ DC Persistent Memory, and SDRAM with one Intel® Stratix® 10 DX FPGA

Last week, Intel announced shipments of new Intel® Stratix® 10 DX FPGAs to several early access program customers including VMware. There are currently three announced members of the Intel Stratix 10 DX FPGA family. These new FPGAs are high-bandwidth interconnection machines with support for high-speed interface protocols including Intel® Ultra Path Interconnect (Intel® UPI) and PCIe Gen4 x16. In addition, a new soft-IP memory controller for Intel Stratix 10 DX FPGAs is designed to control non-volatile Intel® Optane™ DC persistent memory modules, with a maximum capacity of 4 Tbytes per FPGA using the largest Intel Optane DC persistent memory modules.

The Intel Stratix 10 DX FPGA’s PCI-SIG compliant Gen4 x16 interface ports deliver a peak data bandwidth of 32 Gbytes/sec per PCIe Gen4 x16 interface (based on the theoretical maximum peak data rate of 16 Gtransfers/sec per PCIe Gen4 lane). The Intel Stratix 10 DX FPGA’s UPI interface is designed to connect specifically to future select Intel Xeon® Scalable processors over a coherent, high-speed, low-latency connection. Multiple, hard-IP, 100 Gbps Ethernet MACs and 57.8 Gbps PAM4 GXE transceivers – also configurable as 28.9 Gbps NRZ transceivers – allow Intel Stratix 10 DX FPGAs to support high-speed Ethernet connections at data-center rates.

Intel Optane DC persistent memory modules use the DDR4 SDRAM electrical interface protocol but require somewhat different signal timing and different read-and-write protocols. Intel Stratix 10 DX FPGAs can implement as many as four 72 bit, DDR4-compatible channels, which allows these FPGAs to control as many as four banks of Intel Optane DC persistent memory per FPGA, with one or two Intel Optane DC persistent memory modules per 72 bit memory channel.

In addition to the Intel Optane DC persistent memory controllers, the Intel Stratix 10 DX FPGAs also incorporate multiple hard-IP SDRAM controllers for DDR3 and DDR4 memories. These same SDRAM controllers are an integral part of all Intel Stratix 10 FPGA devices. Together, the Intel Optane DC persistent memory controllers and the SDRAM controllers in Intel Stratix 10 DX FPGAs make these devices excellent foundational blocks for high-performance, memory-expansion subsystem designs intended to be used in servers and other CPU-based systems.

All Intel Stratix 10 devices including Intel Stratix 10 DX FPGAs can include soft-IP blocks for SSD control. Consequently, Intel Stratix 10 DX FPGAs can be used as the heart of memory/storage expansion subsystem designs capable of supporting SDRAM, Intel Optane DC persistent memory, and SSD storage – all with just one FPGA controlling the memory and storage devices.

Although the Intel Stratix 10 DX FPGAs’ PCIe Gen4 and UPI interfaces and memory-interface features make these devices an ideal foundation for memory/storage-expansion cards, using these FPGAs in this manner leaves the devices’ logic fabric highly under-utilized. The Intel Stratix 10 DX FPGAs’ on-chip logic fabric, digital signal processors (DSPs), and fast SRAM and in-package HBM2 DRAM (available in certain specific Intel Stratix 10 DX devices) can be combined to provide a substantial amount of on-chip processing ability. System designers can realize significant additional performance benefits by structuring all of these resources (on-chip memory, attached DDR4 SDRAMs, attached Intel Optane DC persistent memory) to accelerate specific workloads that run locally on custom designed processing engines instantiated in the FPGA’s programmable hardware.

With these high-speed I/O and memory capabilities, plus the full complement of programmable logic incorporated into every Intel Stratix 10 FPGA family member, Intel Stratix 10 DX FPGAs are an excellent fit for a wide range of applications and workloads including SmartNIC acceleration, memory expansion for CPU-based systems including cloud and edge servers, and data center disaggregation. For example, one important workload that’s well-suited to FPGA-based implementation is in-memory database acceleration. The growth of big data has driven the need for larger and larger, memory-resident databases. Using an FPGA as a memory expander devoted to Intel Optane DC persistent memory allows large amounts of warm data to be kept in non-volatile Intel Optane DC persistent memory while the host CPU works on hot data using its local DRAM storage.


For more information about the new Intel Stratix 10 DX FPGAs, click here.

To go directly to the Intel Stratix 10 DX FPGA device overview, click here.


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Steven Leibson

About Steven Leibson

Be sure to add the Intel Logic and Power Group to your LinkedIn groups. Steve Leibson is a Senior Content Manager at Intel. He started his career as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He’s served as Editor in Chief of EDN Magazine and Microprocessor Report and was the founding editor of Wind River’s Embedded Developers Journal. He has extensive design and marketing experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.