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Programmable Logic

Tag: Cloud

  • Intel and University of Massachusetts Lowell pilot FPGA learning for students in the Intel® DevCloud. You can now use these resources too, for free The COVID-19 pandemic has disrupted everyone’s lives in ways we could never have imagined. For example, the most basic methods of teaching and learning based on group settings are no longer easy or even possible in many locations. The challenge is to deliver high-quality instruction while dealing with the reality of group-learning restrictions. Like all educational institutions, universities are currently...
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  • SmartNICs based on Intel® FPGAs Boost Converged Broadband Network Performance To meet consumer demands, telco providers that offer both wireless and wireline access to customers rely on dual, complex fixed and mobile infrastructures that must constantly be upgraded and maintained at great cost. Consequently, telco Internet providers continuously explore new ways to reduce costs and create new revenue streams. Many operators, for example, are eyeing 5G fixed-mobile convergence (FMC) to...
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  • Intel and partners announce high-performance SmartNICs that deliver programmable network acceleration for cloud data centers and communications infrastructure Intel has been a leader in Ethernet networking since the very beginnings of the IEEE 802 standard. The first Ethernet specification, Version 1.0, was published on September 30, 1980 – forty years ago. It was submitted as a candidate for the active IEEE project 802 local area network standardization effort. The original Ethernet specification document was called the “Blue Book”...
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  • Free Webinar: Offload Hyperscale DDoS Attacks to SmartNICs and see a 300X performance improvement. July 30 Distributed Denial of Service (DDoS) attacks are increasing in size, complexity, and severity. Service providers demand virtual security solutions that offer flexible and robust defenses against these increasingly frequent attacks. The F5 Networks BIG-IP VE for SmartNICs solution instantiated on an Intel® FPGA Programmable Acceleration Card N3000 can handle large DDoS attacks – as much as 300X larger – than...
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  • Hot Chips 2020 Conference (August 16-18) announces program including several Intel presentations covering server and mobile processors, FPGAs, quantum computing, and a Jim Keller keynote Do you need to keep up with the latest developments in processor, chip architecture, semiconductor, and advanced computing technology? The annual Hot Chips conference has been the place to surf technology’s leading edge for the last 30 years – and this year is no exception. At this year’s Hot Chips conference, now scheduled for August 16 through 18 as a...
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  • Gen-Z Consortium demos 5x SQLite database acceleration at SC’19 with an Intel UPI link between an Intel® Xeon CPU and an Intel® FPGA Last week at the Supercomputing 2019 (SC’19) conference held in Denver, the Gen-Z Consortium demonstrated a proof-of-concept (POC) SQLite database acceleration demo that showed a 5x performance improvement in the average database INSERT operation time, with a clear path to even better performance. The demo employed a Gen-Z DRAM Memory Module (ZMM) with an integrated memory controller connected over the...
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  • Low-latency key-value store resides in FPGA SRAM, delivers data in a deterministic 500 nsec Professor John Lockwood sits behind the wheel, piloting his slick electric roadster around a landscape filled with renewable energy sources: wind turbines, solar arrays, and a hydroelectric dam. He’s actually sitting at a simulation console in the Algo-Logic booth at the Supercomputing 2019 (SC’19) conference in the Denver Convention Center, watching the simulated world go by on a large-screen monitor...
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  • Altran demonstrates FPGA-based Fronthaul Gateway software framework for 5G at Mobile World Congress Los Angeles Last week, at Mobile World Congress Los Angeles, Altran demonstrated its disaggregated Fronthaul Gateway software framework for mobile communications networks based, in part, on Intel FPGAs. This software framework allows wireless carriers, network equipment manufacturers (NEMs), and network equipment providers (NEPs) to accelerate large-scale 5G fronthaul deployment in a scalable manner. With 5G technology now driving growth in mobile networking,...
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  • Improve NFV Infrastructure performance with Segment Routing over IPv6 using the Intel® FPGA PAC N3000 Segment Routing (SR) transforms the way networking infrastructure handles packets to achieve better network performance. It’s useful at the Internet’s core and within or between data centers. SR is a simpler way to control networks that uses source routing to pre-program packet routes, to pre-schedule packet processing, and to implement traffic-engineering policies. SR can be used in Multiprotocol Label Switching...
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  • Free Webinar: Accelerate Cassandra NoSQL Database Performance using Intel® FPGA Programmable Acceleration Cards rENIAC’s Distributed Data Engine accelerates Apache Cassandra NoSQL database performance by as much as an order of magnitude. It improves both throughput and latency for database transactions. Facebook originally developed the Apache Cassandra distributed NoSQL database to power its inbox search feature and released it to the open-source community more than a decade ago, where it has continued to flourish....
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