Supermicro’s new short-depth 2U Ultra SuperServer for 5G and NFV applications incorporates two 2nd Gen Intel® Xeon® Scalable processors and supports the Intel® FPGA PAC N3000 accelerator card

Earlier this month, Supermicro announced a new, short-depth 2U Ultra SuperServer optimized to bring powerful industry-standard platforms to 5G and telecommunications environments. The new 2029U-MTNRV Ultra SuperServer supports two 2nd Gen Intel® Xeon® Scalable processors and the Intel® FPGA Programmable Acceleration Card N3000 (Intel FPGA PAC N3000), which can be used to accelerate 5G and network functions virtualization (NFV) workloads for telecommunications equipment manufacturers (TEMs), virtual network functions (VNF) vendors, system integrators, and telcos. The 2029U-MTNRV Ultra SuperServer also features high reliability, availability and serviceability (RAS) capabilities specifically for these applications and workloads.



The new Supermicro 2029U-MTNRV Ultra SuperServer supports two 2nd Gen Intel® Xeon® Scalable processors and the Intel® FPGA PAC N3000


Contact Supermicro directly for more information about the company’s new, short-depth 2U Ultra SuperServer.


Intel’s silicon and software portfolio empowers our customers’ intelligent services from the cloud to the edge. The Intel FPGA PAC N3000 is a full-duplex 100 Gbps in-system re-programmable acceleration card for multi-workload networking application acceleration.


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Steven Leibson

About Steven Leibson

Be sure to add the Intel Logic and Power Group to your LinkedIn groups. Steve Leibson is a Senior Content Manager at Intel. He started his career as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He’s served as Editor in Chief of EDN Magazine and Microprocessor Report and was the founding editor of Wind River’s Embedded Developers Journal. He has extensive design and marketing experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.