SoftIron accelerates Ceph open-source, software-defined storage performance with FPGA-based storage appliances


Software-defined storage (SDS) solutions “can reduce TCO by 50% or more without sacrificing performance, data services software robustness, or availability service-level objectives,” says SoftIron CTO Phil Straw, quoting Gartner in his article titled “Storage Wars: SDS and the inevitability of Ceph.” Ceph is an open-software storage platform that treats data like stored objects because big data is just easier to manage this way. Ceph includes software libraries that provide applications with interfaces for storing and retrieving objects, blocks, and files and achieves fault tolerance by replicating objects across a cluster of nodes. Straw’s article later adds “Ceph will be the next Linux” due to Ceph’s broad and growing industry acceptance.

During an interview, Straw listed some of the major successes in the world of open-source software:

“If you look at Linux, it was always the operating system that had a [needed] driver for the graphics card. It [Linux] wasn’t the best OS in the early days, but it emerged as the clear choice for an open-source, Unix-type operating system. If you look at Apache, it had everything you needed for a Web server. If you look at mySQL, it reached feature parity with enterprise databases with an 80% overlap. You could plug it [MySQL] in and do most of the things that you would want to do with any database. This is what’s happening with Ceph. It plugs in and works well with OpenStack, to the point that 90% of all the OpenStack installs use Ceph underneath. That’s rapidly becoming the case with Kubernetes at scale as well.”

Given Ceph’s central significance in the software-defined storage universe, SoftIron’s current goal is to develop a family of accelerated Ceph appliances. The company’s HyperDrive™ software-defined storage appliance portfolio is built on Ceph designed and optimized for SDS applications running Ceph. Each SoftIron HyperDrive 1U unit runs an accelerated version of Ceph at wire speed while consuming less than 100 watts.


A SoftIron HyperDrive Ceph storage appliance uses an Intel® Arria® 10 FPGA to implement erasure coding at wire speed


As stated above, Ceph delivers fault-tolerant storage and conventional Ceph implementations use triple data redundancy to deliver that fault-tolerant storage. However, there’s an alternative to triple-redundant data storage called erasure coding (EC), which expands and encodes the original data with redundant data bits. In communications, this technique is often called forward error correction (FEC).

Erasure coding adds bit-level redundancy to the data so that the original block of data can be recovered from just a fraction of the expanded version that’s been stored. Typically, says Straw, data that’s been made fault-tolerant with EC consumes 55% less storage space compared to storing the data three times to achieve fault tolerance through redundancy. When you’re talking about storing petabytes of data, and SoftIron is indeed offering petabyte-class storage systems, a 55% savings in storage space represents a huge economic benefit.

However, as usual, you don’t get something for nothing. Running petabytes of data through an EC algorithm requires a lot of computational horsepower. Done serially with a processor, the EC algorithm would slow SoftIron’s HyperDrive storage systems to unusable levels. However, SoftIron doesn’t implement the EC algorithm with software-driven processors. Instead, the company uses an Intel® Arria® 10 FPGA to accelerate the EC algorithm for the Ceph application. The result is a storage appliance that delivers wire-speed operation over a 10 Gbps Ethernet connection with the accompanying 55% storage savings that EC provides over triply redundant data storage.

The Intel Arria 10 FPGA can achieve wire-speed EC performance because its programmable-logic resources provide massively parallel computational capabilities. However, the same can be said for any FPGA. When asked why SoftIron selected the Intel Arria 10 FPGA, Straw said:

“That particular FPGA has oodles of performance for that device class. We needed lots and lots and lots FPGA infrastructure to handcraft our RTL. We’re not using DSP blocks. We’re not using anything exotic in there, in the fabric. It’s just RTL. We tuned it to be an exact fit for our particular architecture, and it turns out that we could do that very well with the Intel Arria 10 FPGA.”

This is not the end of the story, however. There are more algorithms for the Intel Arria 10 to accelerate in the SoftIron HyperDrive. Straw implied a wider future for acceleration beyond EC:

“We’re just trying to make the best possible storage appliance that we can,” said Straw. “That includes performance, density, economics, reliability, and data protection. There are certain things that work well in software and there are certain things that naturally work well in hardware. We’re just trying to build a storage utopia.”


Published on Categories Acceleration, Arria, StorageTags , ,
Steven Leibson

About Steven Leibson

Be sure to add the Intel Logic and Power Group to your LinkedIn groups. Steve Leibson is a Senior Content Manager at Intel. He started his career as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He’s served as Editor in Chief of EDN Magazine and Microprocessor Report and was the founding editor of Wind River’s Embedded Developers Journal. He has extensive design and marketing experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.