SmartNICs based on Intel® FPGAs Boost Converged Broadband Network Performance

To meet consumer demands, telco providers that offer both wireless and wireline access to customers rely on dual, complex fixed and mobile infrastructures that must constantly be upgraded and maintained at great cost. Consequently, telco Internet providers continuously explore new ways to reduce costs and create new revenue streams. Many operators, for example, are eyeing 5G fixed-mobile convergence (FMC) to lower costs and add new agile services. FMC also helps telco providers to meet the customer needs. Both consumer and business customers are looking for multi-access connectivity and a seamless service experience.

Innovations such as software-defined networking (SDN) and network function virtualization (NFV), are key to enabling the network transformation at the telco’s edge. These innovations support new capabilities including the User Plane Function (UPF), the Access Gateway Function (AGF), and Broadband Network Gateway (BNG). The combination of these new capabilities enables higher throughput and lower latency for traffic between the telco central office (CO) and broadband customers, both wireless and wireline, through a newly shared infrastructure.

Finding the right hardware on which to host these new virtual network functions (VNFs) at the network edge is a big challenge because telco COs must upgrade infrastructure while meeting physical space, power, and cooling constraints. The hardware solution also must be sufficiently cost-effective to support the additional, ever present goals for reducing capital expenditures (CapEx) and operating expenses (OpEx). Finally, the solution needs to scale to handle tens of thousands―or even hundreds of thousands―of subscriber connections.

SmartNICs built with Intel® FPGAs provide solutions to these challenges while still offering the advantages of a commercial off-the-shelf (COTS) solution. One such SmartNIC, just announced by Silicom, is the Silicom FPGA SmartNIC N5010. This SmartNIC is a high-performance, programmable PCIe server adapter that combines an Intel Stratix 10 DX FPGA – which integrates high performance, high-bandwidth memory (HBM) – and an Intel® Ethernet 800 series adapter. Use these SmartNICs to accelerate the UPF, AGF, and BNG functions and to realize many performance benefits including high-throughput packet processing, smart and effective packet load balancing to CPU cores, and Hierarchical Quality of Service (HQoS). These capabilities are crucial to support high bandwidth and low latency in converged access networks.

A new Solution Brief from Intel titled “SmartNICs with Intel® FPGAs Boost Performance for Converged Broadband Networks” discusses these topics in more detail.

 

 

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Published on Categories Cloud, Communications, PAC, StratixTags , , ,
Steven Leibson

About Steven Leibson

Be sure to add the Intel Logic and Power Group to your LinkedIn groups. Steve Leibson is a Senior Content Manager at Intel. He started his career as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He’s served as Editor in Chief of EDN Magazine and Microprocessor Report and was the founding editor of Wind River’s Embedded Developers Journal. He has extensive design and marketing experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.