ServeTheHome.com publishes in-depth, hands-on review of the Supermicro SYS-1019P-FHN2T SuperServer with an Intel® FPGA Programmable Acceleration Card N3000

ServeTheHome.com (STH), a Web site that bills itself as “the IT professional’s guide to servers, storage, networking, and high-end workstation hardware,” recently published a hands-on review of  the Supermicro SuperServer SYS-1019P-FHN2T – a 1U edge server based on the Intel® Xeon® Scalable processor with an integrated Intel® FPGA Programmable Acceleration Card (Intel® FPGA PAC) N3000 –  which can be used to accelerate 5G and network functions virtualization (NFV) workloads for telecommunications equipment manufacturers (TEMs), virtual network functions (VNF) vendors, system integrators, and telcos.

The article, written by STH’s Editor in Chief Patrick Kennedy, is titled “Supermicro SYS-1019P-FHN2T with Intel PAC N3000 Hands-on” and includes a 12-minute embedded video featuring Kennedy, who visited the Supermicro offices in person to review the Supermicro SYS-1019P-FHN2T SuperServer with a hands-on perspective.

In discussing the Intel FPGA PAC N3000, Kennedy writes:

“The PAC N3000 was designed for systems like the Supermicro SYS-1019P-FHN2T as it is designed for 5G service provider edge deployments. Instead of this FPGA card having to be part of a larger custom solution, Intel can offer the card in a PCIe form factor, housed in the SYS-1019P-FHN2T making it flexible.”

Kennedy has been running STH since 2009. This article and the embedded video pack a lot of Kennedy’s insights regarding edge servers, their design, and their myriad uses. The article concludes with Kennedy writing:

“The global 5G mobile build-out is a huge opportunity. Companies like Supermicro and Intel have systems like the Supermicro SYS-1019P-FHN2T with the Intel FPGA PAC N3000 precisely to address the unique requirements of the 5G edge deployments.”

 

Click on the link above to read the full article on the STH site.

 

Intel’s silicon and software portfolio empowers our customers’ intelligent services from the cloud to the edge.

 

 

Notices & Disclaimers

Intel technologies’ features and benefits depend on system configuration and may require enabled hardware, software or service activation. Performance varies depending on system configuration. Check with your system manufacturer or retailer or learn more at www.intel.com.

Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products. For more complete information visit www.intel.com/benchmarks.

Performance results may not reflect all publicly available security updates.

No product or component can be absolutely secure.

Intel does not control or audit third-party data. You should consult other sources to evaluate accuracy.

Your costs and results may vary.

Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others.

Published on Categories 5G, Acceleration, Communications, PACTags , , ,
Steven Leibson

About Steven Leibson

Be sure to add the Intel Logic and Power Group to your LinkedIn groups. Steve Leibson is a Senior Content Manager at Intel. He started his career as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He’s served as Editor in Chief of EDN Magazine and Microprocessor Report and was the founding editor of Wind River’s Embedded Developers Journal. He has extensive design and marketing experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.