See the explosive intersection of Intel® FPGAs, Intel® CPUs, and ProAV digital video in action at ISE 2020 next month in Amsterdam

Now that ProAV has gone completely digital and must deal with high-quality, high bandwidth, low-latency, uncompressed and compressed video workloads, Intel’s corporate, data-centric mantra clearly applies:

Move data faster, efficiently store and access data, and process everything

You’ll be able to see this mantra in action in the Intel booth (#8-C210) at next month’s Integrated Systems Europe (ISE) 2020 show in Amsterdam. ISE is the world’s largest AV and systems integration tradeshow with 1300 exhibitors, many thousands of products on display, and 80,000 attendees from 190 countries. The Intel booth will contain several significant demos including:

 

  • A real-time, video-based, traffic-tracking demo by Corerain that collects statistics on the people observed in the Intel booth at the show. The demo determines the number of people in the booth and the average time spent per person in each booth zone. There are obvious applications for this technology in both the retail environment and for security applications. This demo showcases the Corerain CAISA AI inference engine (for more information, see “Corerain’s CAISA stream engine transforms FPGA into Deep Learning Neural Network without HDL coding”) running on an IEI TANK-AIoT Dev Kit, which includes a IEI fanless industrial PC based on an Intel® Core™ i5 processor and a pre-installed copy the Intel® Distribution of OpenVINO® toolkit, developed specifically to aid in the development of vision-based solutions and compatible with a range of Intel® CPUs, Intel® GPUs, Intel® FPGAs, and the Intel® Movidius™ Neural Compute Stick. An Inspur PAC A10 programmable accelerator card – which is based on an Intel® Arria® 10 FPGA – is plugged into one of the PC’s PCIe slots. It provides a real-time acceleration platform for the Corerain CAISA AI inference engine.
  • A highly responsive, large-format, 46-inch interactive flat panel display (IFPD) based on SigmaSense® technology, which provides superior touch performance compared to existing solutions. This display demonstrates full concurrency for self-capacitive, mutual-capacitive sensing. The company’s SigmaDrive™ concurrent drive and sense technology provides ultra-low-latency and achieves industry-leading signal-to-noise (SNR) by implementing real-time computational functions with five Intel® Cyclone® V SoCs. The demo’s IFPD communicates with a host PC based on an Intel® Core processor. The PC runs a variety of touch-enabled applications that integrate SigmaVision™ capacitive imaging functionality. The interactive SigmaSense touch technology accommodates screen sizes up to and beyond 100 inches (diagonally) and reduces the time needed for sensor tuning – an often tedious task that can require weeks of engineering work – to minutes. This touch technology works through water, gloves, or thick glass and is well suited for interactive tabletops and outdoor and retail interactive digital signage.
  • An Ibase SP-63E 8K/12K Digital Signage Player that uses an Intel Core processor and three Intel Arria 10 FPGAs to display video from a media player based on an Intel® NUC Mini PC on a large mosaic of HD displays. Together, the Intel Core processor and the three Intel Arria 10 FPGAs process the video, scale it, slice it, and distribute it in real time to a large video wall constructed with twelve 1080p60 HDMI display panels. Large video walls are well suited to retail, enterprise, and educational environments and anywhere else that needs large, attention-getting digital signage.

 

ISE 2020 takes place in Amsterdam on February 11-14.

 

 

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Steven Leibson

About Steven Leibson

Be sure to add the Intel Logic and Power Group to your LinkedIn groups. Steve Leibson is a Senior Content Manager at Intel. He started his career as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He’s served as Editor in Chief of EDN Magazine and Microprocessor Report and was the founding editor of Wind River’s Embedded Developers Journal. He has extensive design and marketing experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.