S2C’s free, 2-hour ASIC prototyping Webinar on December 10 will show you how to prototype billion-gate designs on world’s highest capacity FPGA

Last month saw the introduction of the Intel® Stratix® 10 GX 10M FPGA, the world’s highest capacity FPGA. This device specifically targets ASIC emulation and prototyping applications. Within days, S2C, a Gold member of the Intel® FPGA Design Solutions Network, announced that it was shipping a modular ASIC prototyping system based on this FPGA, the S10 10M Prodigy Logic System with a maximum prototyping capacity of nearly a billion ASIC gates. Now, you can learn a lot more about prototyping extremely large ASIC designs in a 2-hour Webinar that S2C will be presenting on December 10, in cooperation with SemiWiki.com. The Webinar is free, but you’ll need to register

And you’ll need to hurry because there are only a few days remaining before the Webinar.

Register here.

 

For more information about the Intel Stratix 10 GX 10M FPGA, see “Intel announces Intel® Stratix® 10 GX 10M FPGA, world’s highest capacity with 10.2 million logic elements. Targets ASIC Prototyping and Emulation Markets.”

For more information about S2C’s new ASIC prototyping system, see “S2C launches Prodigy Logic Systems for prototyping large ASIC designs based on the world’s highest capacity FPGA, the Intel® Stratix® 10 GX 10M.”

 

 

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Steven Leibson

About Steven Leibson

Be sure to add the Intel Logic and Power Group to your LinkedIn groups. Steve Leibson is a Senior Content Manager at Intel. He started his career as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He’s served as Editor in Chief of EDN Magazine and Microprocessor Report and was the founding editor of Wind River’s Embedded Developers Journal. He has extensive design and marketing experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.