S2C announces FPGA Prototyping System with 300M ASIC gate capacity based on four Intel® Stratix® 10 GX 10M FPGAs

When it comes to validating next-generation SoC designs in cutting-edge applications such as 5G, AI, and Networking using an FPGA prototyping system… bigger is better. S2C’s new Quad 10M Prodigy Logic System embodies that concept by delivering a platform comprised of four Intel® Stratix® 10 GX 10M FPGAs. Each FPGA delivers 10.2 million logic elements (LEs), for a combined capacity of 40.8 million LEs, along with 1,012 Mbits of on-chip SRAM and 13,824 DSP blocks. S2C says that the system has a prototyping capacity equivalent to 300 million ASIC gates.

 

The S2C Quad 10M Prodigy Logic System is based on four Intel® Stratix® 10 GX 10M FPGAs

 

In addition, the Quad 10M Prodigy Logic System provides 4,608 high-performance I/O pins and 160 high-speed transceivers that can run up to 16Gbps. The high-performance I/O pins are used for inter-FPGA connections and are also available for use with S2C’s Prodigy daughter cards. There are currently more than 90 Prodigy daughter cards in S2C’s library.

S2C’s multitalented Prodigy Player Pro tool manages the Quad 10M Prodigy Logic System. It configures your design in the FPGA prototyping system using an automated compilation flow that assigns I/O pins, partitions your design across multiple FPGAs, and runs remote system management over a USB or Ethernet connection. It also supports multi-FPGA debugging with deep tracing for as many as 32K probes per FPGA.

S2C’s Quad 10M Prodigy Logic System is the company’s second FPGA prototyping system to be based on the Intel Stratix 10 GX 10M FPGA. The first such system, the expandable S10 10M Prodigy Logic System, was announced late last year. (See “S2C launches Prodigy Logic Systems for prototyping large ASIC designs based on the world’s highest capacity FPGA, the Intel® Stratix® 10 GX 10M.”)

The S2C Quad 10M Prodigy Logic System is available for purchase now. For more information about S2C’s Quad 10M Prodigy Logic System, please contact S2C directly.

 

For more information about the Intel Stratix 10 GX 10M FPGA, see “Intel announces Intel® Stratix® 10 GX 10M FPGA, world’s highest capacity with 10.2 million logic elements. Targets ASIC Prototyping and Emulation Markets.”

 

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Steven Leibson

About Steven Leibson

Be sure to add the Intel Logic and Power Group to your LinkedIn groups. Steve Leibson is a Senior Content Manager at Intel. He started his career as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He’s served as Editor in Chief of EDN Magazine and Microprocessor Report and was the founding editor of Wind River’s Embedded Developers Journal. He has extensive design and marketing experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.