Ready to Use Intel® oneAPI Toolkits with FPGAs? Get ready with this free 6-hour course

The Intel® oneAPI Toolkits allow developers to develop, optimize, and deploy algorithms that use Intel FPGAs as look-aside accelerators in computing systems. A free 6-hour class will teach you how to write and compile Data Parallel C++ (DPC++) code that targets Intel® FPGAs. You will learn and practice the Intel oneAPI development flow to:

  • Emulate your code to ensure functionality
  • Optimize your code using reports, and
  • Generate and profile the compiled FPGA hardware bitstream

These are instructor-led classes taking place on October 13 and December 8, 2020. An included hands-on lab will take you through multiple optimization stages for example DPC++ code.

This is not the first time this course has been presented and the reactions from prior students has been enthusiastic:

 

“The workshop explains how to use oneAPI very clearly. It’s extremely helpful in understanding the flow for accelerating the C++ applications on Intel FPGAs, CPUs and GPUs. It also presents many optimization techniques.”

“The workshop was deeply technical and hands on. The labs were easy to follow and also the instructor Susannah was available to help”

“Easy to use with multi-platform systems”

“Good introduction from a software perspective given by a great teacher”

“Good overview of oneAPI for FPGAs; right pace and nice labs!”

 

Note: The course is free. When asked for payment, select Credit Card/Purchase Order Instructions. You will not be asked for a CC number and will not be charged.

 

Ready to sign up for this comprehensive, free course? Register here.

 

Notices & Disclaimers

 

Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors.

Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products.  For more complete information visit www.intel.com/benchmarks.

Performance results are based on testing as of dates shown in configurations and may not reflect all publicly available ​updates. See backup for configuration details. No product or component can be absolutely secure.

Your costs and results may vary.

Intel technologies may require enabled hardware, software or service activation.

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. ​

Published on Categories Acceleration, oneAPITags ,
Steven Leibson

About Steven Leibson

Be sure to add the Intel Logic and Power Group to your LinkedIn groups. Steve Leibson is a Senior Content Manager at Intel. He started his career as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He’s served as Editor in Chief of EDN Magazine and Microprocessor Report and was the founding editor of Wind River’s Embedded Developers Journal. He has extensive design and marketing experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.