Need PCIe Gen4 x16 version 1.0 capability with full PCI-SIG compliance in an FPGA today? Intel® Agilex™ FPGAs can deliver.

A new YouTube video on the Intel FPGA channel describes the successful testing of the PCIe Gen4 x16 I/O capabilities built into Intel® Agilex™ FPGAs. These 10nm devices, now shipping, have successfully demonstrated PCIe Gen4 x16 operation at 16 GTransfers/sec. (They’re also designed to support PCIe Gen5 x16 operation at 32 GTransfers/sec.) The PCIe Gen4 validation tests successfully exercised a number of PCIe capabilities in the Intel Agilex FPGA including:

  • Endpoint mode
  • Root complex mode
  • Bifurcation

 

Additional PCIe Gen4 features supported by Intel Agilex FPGAs include:

  • SR-IOV
  • VirtIO
  • Shared virtual memory
  • Scalable IOV

 

For more details, here’s the video:

 

 

For additional information about Intel Agilex FPGAs, see “First Shipments of 10nm Intel® Agilex™ FPGAs reach early access customers,” “Intel Driving Data-Centric World with New 10nm Intel Agilex FPGA Family,” and the white paper titled “Intel® Agilex™ FPGAs Deliver a Game Changing Combination for the Data Centric World.”

 

 

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Published on Categories AgilexTags
Steven Leibson

About Steven Leibson

Be sure to add the Intel Logic and Power Group to your LinkedIn groups. Steve Leibson is a Senior Content Manager at Intel. He started his career as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He’s served as Editor in Chief of EDN Magazine and Microprocessor Report and was the founding editor of Wind River’s Embedded Developers Journal. He has extensive design and marketing experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.