Learn how to use Intel® FPGAs in critical Functional Safety applications: two free on-demand training Webinars

Designs with formal functional safety requirements in markets such as industrial automation, transportation, the smart grid, automotive, military, aerospace, and medical require highly reliable systems that are certified to comply with established safety standards such as IEC 61508 and ISO 13849. Design challenges for such systems include:

  • Adopting quality management standards and implementing a “safe” design methodology
  • Accounting for additional project effort, development time, and technology, which can result in longer time to market and higher cost of ownership

The additional steps required to design an application with functional safety certification in mind adds significant project complexity. However, getting immediate access to qualified semiconductor data, intellectual property (IP), development flows, and design tools from Intel can help you significantly shorten your overall project development time.

To simplify and speed up the safety certification process, Intel worked closely with TÜV Rheinland to develop an IEC61508 certified Functional Safety Data Package, which includes:

  • Safety manuals for Intel® FPGAs and Intel® Quartus® Prime Design Software
  • Diagnostic and standard intellectual property (IP) such as the Nios® II processor
  • Intel FPGA design flows including a safety separation design flow
  • Development tools, including the Intel Quartus Prime Design Software

Two free on-demand training Webinars from Intel can guide you through the process of developing systems that meet functional safety requirements using Intel FPGAs using the Functional Safety Data Package. These Webinars are:

 

This first Webinar provides an overview of functional safety concepts and regulations. The training will allow you to benefit from Intel’s long experience with functionally safe design and will show you how to comply with today’s safety standards. This is a 55-minute Webinar.

 

This second Webinar covers the advantages of using Intel FPGAs for developing systems with functional safety requirements and explains how to maximize these benefits in your next design. This training reviews the use and application of Intel FPGAs and delves into Intel’s TÜV-qualified FPGA design methodology, which greatly reduces development effort, system complexity, and time to market for system designs with functional safety requirements. This is a 65-minute Webinar.

 

Customers who register for and attend these training Webinars will receive an email inviting them to interact with Intel experts via email or to join a live “Ask the Expert” WebEx session.

For more information about the functional safety aspects of designing with Intel FPGAs, click here.

 

Intel’s silicon and software portfolio empowers our customers’ intelligent services from the cloud to the edge.

 

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Your costs and results may vary.

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Steven Leibson

About Steven Leibson

Be sure to add the Intel Logic and Power Group to your LinkedIn groups. Steve Leibson is a Senior Content Manager at Intel. He started his career as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He’s served as Editor in Chief of EDN Magazine and Microprocessor Report and was the founding editor of Wind River’s Embedded Developers Journal. He has extensive design and marketing experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.