Intel’s One API will allow you to write code once, then target many processing resources: CPUs, GPUs, FPGAs, AI engines

Written by | June 20, 2019

 

This week, during Intel’s Software Technology Day held in London, Intel discussed an ongoing Intel software project called “One API.” The project’s purpose is to deliver a simple and scalable set of software tools that allow developers to create one source code base using a unified programming model and to then accelerate all or portions of that code by targeting the growing and diverse set of Intel processing architectures including scalar processors (CPUs), vector processors (GPUs), matrix processors (AI engines), and spatial processing elements (FPGAs). Intel will release a developer beta version and additional details about the One API project in the fourth quarter of 2019.

One API will support direct programming through a new programming language called “Data Parallel C++” (DPC++) and, additionally, through API calls. Intel’s One API will incorporate API libraries that span several workload domains and will also include enhanced analysis and debug tools tailored to DPC++.

DPC++ delivers data-parallel programming productivity and performance using a programming model that’s already familiar to many developers. It’s based on C++ and incorporates the Khronos® Group’s SYCL™, which supports single-source, heterogeneous programming. One API will allow you to run a workload today on existing Intel® Xeon®-based servers and systems and then transition portions of that workload to more specialized accelerators for more performance. Thus Intel’s One API will make it straightforward to realize the benefits of acceleration hardware immediately without rearchitecting your code.

Note: Intel already offers a version of this kind of multiplatform, cross-architecture toolkit in the Intel® Distribution of OpenVINO™ toolkit, which includes optimized API calls for OpenCV and OpenVX libraries.

 

 

For more information, see “Intel’s ‘One API’ Project Delivers Unified Programming Model Across Diverse Architectures.”

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Steven Leibson

About Steven Leibson

Be sure to add the Intel Logic and Power Group to your LinkedIn groups. Steve Leibson is a Senior Content Manager at Intel. He started his career as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He’s served as Editor in Chief of EDN Magazine and Microprocessor Report and was the founding editor of Wind River’s Embedded Developers Journal. He has extensive design and marketing experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.