Intel and partners announce high-performance SmartNICs that deliver programmable network acceleration for cloud data centers and communications infrastructure

Intel has been a leader in Ethernet networking since the very beginnings of the IEEE 802 standard. The first Ethernet specification, Version 1.0, was published on September 30, 1980 – forty years ago. It was submitted as a candidate for the active IEEE project 802 local area network standardization effort. The original Ethernet specification document was called the “Blue Book” because of the light blue cover on the printed specification. Three company names appeared on that cover. One of those three names was Intel. Last week, just slightly more than forty years after the publication of that first Ethernet specification, Intel and its partners announced new, high-performance SmartNIC products that deliver programmable network acceleration for cloud data centers and communications infrastructure.

The first such network acceleration product is the Inventec FPGA SmartNIC C5020X, which is based on the new Intel FPGA SmartNIC C5000X platform architecture designed to meet the needs of Cloud Service Providers. This new architecture boosts data center performance levels by off-loading switching, storage, and security functionality onto a single PCIe platform that combines both Intel FPGAs and Intel Xeon® processors. Customers can define and port custom networking functions to the Intel Stratix 10 FPGA. The familiarity of the Intel® Xeon-D processor integrated into the platform eases the porting effort. Inventec is one of the first ecosystem partners to leverage the Intel FPGA SmartNIC C5000X platform architecture.

The second new SmartNIC is the Silicom FPGA SmartNIC N5010, a hardware-programmable 4x100G FPGA SmartNIC that combines an Intel Stratix 10 DX FPGA with an Intel® Ethernet 800 series adapter. The FPGA-based SmartNIC features enhanced packet buffering and traffic flow monitoring while extending connectivity to multiple 100G Ethernet ports. The Silicom FPGA SmartNIC N5010 delivers the performance and hardware programmability that Communications Service Providers need to accelerate 25G and 100G networks and Intel is partnering with Silicom to deliver this SmartNIC.

The Intel FPGA SmartNIC C5000X platform and the new Silicom FPGA SmartNIC N5010 allow data center architects and network engineering teams at Telecom Equipment Manufacturers (TEMs), Virtual Network Function (VNF) vendors, system integrators, and telcos to supercharge their networks and to free up server CPU cycles for revenue-generating workloads.

New SmartNIC products based on Intel® Stratix™ 10 FPGAs, Xeon-D processors, Intel Ethernet 800 series network adapters, and new platform architectures such as the Intel® FPGA SmartNIC C5000X platform help accelerate cloud data centers and communications infrastructure. Here are some quotes from Inventec, Silicom, other network ecosystem partners, and customers about these new SmartNIC products:


“FPGAs have been the core of Azure’s SmartNIC infrastructure for multiple generations, providing us a high performance, flexible, and differentiated solution,” says Derek Chiou, a Partner Architect at Microsoft.  “We are pleased to see Intel continue to lead the industry by launching the ground-breaking Intel FPGA SmartNIC Platform C5000X that will enable cloud service providers to integrate FPGA technology in their data centers to increase their efficiency, while providing flexibility to suit their needs.” continuing to lead the industry by launching the ground-breaking Smart NIC platform in Big Spring Canyon that can help ecosystem partners to enable cloud service providers to integrate FPGA technology in their data centers to increase their efficiency while providing flexibility to suit their own needs.”


“Inventec is proud to have partnered with Intel to create a unique SmartNIC based upon the Intel® FPGA SmartNIC C5000X platform architecture,” says George Lin, General Manager of Business Unit VI, Inventec Enterprise Business Group (Inventec EBG).  “We immediately realized that this platform would stand out as the SmartNIC for the future, offering customers the ability to customize while still delivering the outstanding performance, programmability, and portfolio of technology that only Intel can provide”


“As a leading provider of connectivity solutions, it’s clear that SmartNICs can dramatically improve the performance and efficiency of 4G/5G edge deployments for Telco providers,” said Boris Beletsky, AVP, Emerging Technologies. “The Silicom FPGA SmartNIC N5010 is the first hardware programmable 200G FPGA accelerated SmartNIC that enables next generation IA-based servers to meet the performance and scaling needs of the 5G core network (UPF), access gateways (BNG, AGF), and security functions (Firewall, IPsec).”


“Kaloom’s Programmable Networking Fabrics enable Telcos, Data Center Operators and CSPs to accelerate performance and monetization of millions of subscribers at the “Edge”, combining state of the art P4-enabled Intel Tofino switches, Stratix 10 FPGAs and Xeon processors in a fully virtualized manner (“slicing”)”, said Philippe Michelet, VP of Product Management. “By specifically leveraging Intel Stratix 10 FPGAs with integrated HBM2 memory running on the Silicom FPGA SmartNIC N5010, Kaloom can support several millions of subscribers as well as the statistics required by operators to correctly account for the data being processed by this new category of “Edge” data centers.”



Click here for a fact sheet with more information about these announcements.

Click here for more information about SmartNIC products from Intel.


For more information about the Intel FPGA SmartNIC C5000X Platform, see the Solution Brief titled “Accelerate Your Data Center with Intel® FPGAs.”

For more information about the Silicom FPGA SmartNIC PN5010, see the Solution Brief titled “SmartNICs with Intel® FPGAs Boost Performance for Converged Broadband Networks.”




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Published on Categories 5G, Acceleration, Cloud, Communications, Networking, StratixTags , , , , ,
Steven Leibson

About Steven Leibson

Be sure to add the Intel Logic and Power Group to your LinkedIn groups. Steve Leibson is a Senior Content Manager at Intel. He started his career as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He’s served as Editor in Chief of EDN Magazine and Microprocessor Report and was the founding editor of Wind River’s Embedded Developers Journal. He has extensive design and marketing experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.