Infrastructure Processing Units (IPUs) intelligently manage and accelerate data center infrastructure

Today during the virtual Six Five Summit, Intel unveiled its vision for infrastructure processing units (IPUs), programmable networking devices designed to enable cloud and communication service providers (CSPs and CoSPs) to reduce overhead and free up CPU cycles by taking over and intelligently managing system-level infrastructure in data centers. IPUs help data centers better utilize resources by providing a secure, programmable, stable solution that helps to balance processing and storage resource demands.

Guido Appenzeller, Chief Technology Officer of the Intel Data Platforms Group, said:

“The IPU is a new category of technologies and is one of the strategic pillars of our cloud strategy. It expands upon our SmartNIC capabilities and is designed to address the complexity and inefficiencies in the modern data center. At Intel, we are dedicated to creating solutions and innovating alongside our customer and partners — the IPU exemplifies this collaboration.

IPUs can:

  • Accelerate infrastructure functions – including storage virtualization, network virtualization and security – using dedicated protocol accelerators.
  • Free up CPU cores by offloading storage and network virtualization functions previously performed by software running on CPUs.
  • Improve data center utilization by allowing more flexible workload placement.
  • Enable CSPs to customize infrastructure function deployments quickly, using software alone.


“As a result of Intel’s collaboration with a majority of hyperscalers, Intel is already the volume leader in the IPU market with our Xeon-D, FPGA and Ethernet components,” said Patty Kummrow, vice president in the Data Platforms Group and general manager of Ethernet Products Group at Intel.

Intel and Intel Partners will continue to roll out FPGA-based IPU platforms and dedicated ASICs that leverage the powerful software foundation that Intel has already developed.


For more information, see “Intel Unveils Infrastructure Processing Unit.”

For more information about FPGA-based IPUs from Intel and Intel Partners, click here.




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Published on Categories Acceleration, IPUTags ,
Steven Leibson

About Steven Leibson

Be sure to add the Intel Logic and Power Group to your LinkedIn groups. Steve Leibson is a Senior Content Manager at Intel. He started his career as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He’s served as Editor in Chief of EDN Magazine and Microprocessor Report and was the founding editor of Wind River’s Embedded Developers Journal. He has extensive design and marketing experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.