How Heterogeneous Device Design and Manufacturing Leads to Success

 

By Patrick Dorsey, Vice President Product Marketing, FPGA and Power Products, Intel

The following guest blog is based on remarks by Patrick Dorsey during a panel discussion on “FPGA Hardware Innovations” at the recent The Next FPGA Platform event, held in San Jose, California on January 22, 2020.

 

One of the looming challenges for FPGA hardware design is answering this question: What do you integrate and what do you give up when you integrate? Flexibility matters. FPGA vendors are in the flexibility business. The above question not only matters within the chip, it also matters at the system level.

Intel offers many choices to designers of heterogeneous hardware systems. Designers can choose among multiple Intel® Xeon® CPUs. Likewise, they have a choice of several Intel® FPGAs. There’s a lot of value in these choices.

Monolithic and heterogeneous integration increase value. Integration in both forms shrinks the overall form factor and improves power consumption. Performance can improve as well. Interfaces can be better optimized.

Heterogeneous integration technology enables even more choice. It’s an option at multiple levels within the system. For example, there are a lot of things that we can do with packaging technology, with the interfaces that we have, and with development tools. The options are there.

Many things are happening between semiconductor vendors and customers that we can’t talk about publicly. For example, there’s a lot of integration that happens with ASICs and with structured ASICs – that’s the Intel® eASIC product. New heterogeneous devices can be manufactured in a customized fashion that could never happen before.

 

Heterogeneous Devices are Here Now

Heterogeneous device design and manufacturing is here now. For example, today’s Intel® Agilex™ FPGAs and Intel® Stratix® 10 FPGAs are already heterogeneous FPGAs. We’ve incorporated HBM2 stacked-die DRAM into both types of FPGA. We’ve put the high-speed serial transceivers for these Intel FPGAs on tiles, or chiplets, so that the Ethernet and PCIe protocols are decoupled from the design of the FPGA fabric. The FPGA fabric benefits when moved to new process nodes while interfaces do not. Heterogeneous design allows Intel to innovate in the FPGA fabric and the I/O interfaces separately, and across nodes. We can use multiple nodes to build very complex devices optimally.

Another facet is the US government’s involvement with heterogeneous design and manufacturing in these early days. Several DARPA programs are driving research into standalone IP that can sit next to the FPGA. This IP can become chiplets. These chiplets can implement specialized functions in the areas of AI or analog-to-digital converters, for example. The DARPA work is all public. It’s called the CHIPS (Common Heterogeneous Integration and IP Reuse Strategies) program.

The chiplets concept has advanced very quickly for FPGAs. It’s in volume manufacturing now, as discussed above. However, there are challenges. The first challenge is TDP, thermal design power. The more functions put into the package, the harder it is to get the heat out. So it’s primarily a thermal problem but it’s also a business-model problem, which makes it a commercial problem. As soon as you have two or more companies putting their IP into the same device, the business model gets a little more complicated. For example, how you go to market with these mixed-vendor heterogeneous devices? These are some of the challenges for heterogeneous device design and manufacture, but despite these challenges, it’s happening now.

 

It Starts with a Great FPGA

In terms of the FPGA innovation for heterogeneous device design, it starts with having a great FPGA. All FPGA vendors are trying to build the best FPGA fabric and there are innovations in the ways that the FPGA fabric works. For example, how does the FPGA’s fundamental logic and compute architecture work with memory? One of an FPGA’s key advantages is it’s on-chip memory, which is especially important these days for AI and machine language (ML). For performance reasons, you really want the AI/ML model to fit into the memory in the FPGA package.

The next area of innovation is the interconnect, whether it’s the heterogeneous interconnect or what happens in the package to solve TDP and power problems. There are things that the US government’s doing around the Intel Advanced Interface Bus (AIB), which is an interface that Intel already uses in the Intel Agilex FPGAs and Intel Stratix FPGAs. Intel released the AIB specification into the open-source arena last year and industry organizations like the CHIPS Alliance are pushing the AIB specification as an open industry standard to allow better die-to-die connectivity and to jumpstart the chiplet ecosystem.

This may sound funny coming from Intel, but it’s not about the semiconductor process alone. Don’t misunderstand that statement. Process technology is extremely important and Intel continues to drive the Moore’s Law process technology cadence. So being on the latest process node is important and I think you’ll see FPGAs continuing to lead the charge when it comes to process technology.

However, the choices made in the design of a new device really depend on the problems you’re trying to solve. You only need to take some functions to the most advanced process node. Some functions, especially I/O functions, can’t take advantage of the most advanced process node. Analog functions and memory can’t use the most advanced process nodes. This is where heterogeneous device design and manufacturing shines.

Chiplets and heterogeneous devices enable choices. You can choose to advance only the functions that need to go faster while reusing designs that already meet performance and power requirements. Heterogeneous design allows you to make different design tradeoffs – in terms of static power, for example – and power has become critical in the design of every new device. At Intel, we’re constantly trying to balance power and performance.

Process nodes matter and a mix of process nodes gives you the most design choices by allowing an easy mix of custom IP, standard IP, flexible FPGA IP, and interconnect IP. Heterogeneous design and manufacturing allow Intel to decide how to best mix these technologies to create new semiconductor products. The world’s getting more complicated, but Intel has more ways to solve these problems than ever before.

 

 

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Published on Categories Agilex, AIB, Chiplets, Stratix, UncategorizedTags , , , , ,
Steven Leibson

About Steven Leibson

Be sure to add the Intel Logic and Power Group to your LinkedIn groups. Steve Leibson is a Senior Content Manager at Intel. He started his career as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He’s served as Editor in Chief of EDN Magazine and Microprocessor Report and was the founding editor of Wind River’s Embedded Developers Journal. He has extensive design and marketing experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.