Horizon Robotics employs Intel® HLS compiler, Arria® 10 FPGAs to develop 3D mapping for autonomous vehicles

 

Horizon Robotics has used the HLS compiler integrated into the Intel® Quartus® Prime Design Software to develop hardware for a real-time, 3D mapping system for autonomous driving applications, based on Intel® Arria® 10 FPGAs. The Horizon Robotics design employs a 3D “vision simultaneous localization and mapping” (VSLAM) algorithm to transform a video stream from a single, front-facing camera mounted to the roof of a vehicle into a real-time, 3D map of the terrain surrounding the vehicle.

Horizon Robotics used the HLS compiler in the Intel Quartus Prime Design Software to develop four key modules: a front-end tracker, a front-end mapper, a back-end optimizer, and a matrix accelerator. These four floating-point modules are complex and, according to Horizon Robotics, would normally have required about a year for development. Using HLS, Horizon Robotics engineers developed these four modules in just four months and integrated them with other modules, which were developed in Verilog, to complete the VSLAM system. HLS also allowed Horizon Robotics to reduce the amount of engineering resources needed to develop the VSLAM system.

Here’s a short video describing the Horizon Robotics project:

 

 

The latest release of the Intel HLS compiler for Intel FPGAs incorporates several improvements and additions including:

 

  • Uses untimed ANSI C++ as the golden design source
  • Allows quick exploration of multiple architectures through high-level directives
  • Simplifies tool usage by inferring design intent from high-level constraints
  • Supports verification of RTL by comparison with the original C++ source model
  • Generates reusable IP for system integration using the Platform Designer integrated into the Intel Quartus Prime design software
  • Supports inference of streaming, memory-mapped, or wire interfaces
  • Performs device-specific, timing-driven schedule optimization and technology mapping for Intel FPGAs
  • Supports a software compiler use model and industry standards including ac_int data types

 

For more information about the Horizon Robotics project and for more information about the latest 19.1 release of the HLS compiler and Intel Quartus Prime Design Software, click here.

For more information about the latest 19.1 release of the entire Intel Quartus Prime Design Software toolkit, see “Intel Quartus Prime Pro Edition software version 19.1 is here. Download it now.

 

Published on Categories ADAS, Arria, HLS, QuartusTags , , ,
Steven Leibson

About Steven Leibson

Be sure to add the Intel Logic and Power Group to your LinkedIn groups. Steve Leibson is a Senior Content Manager at Intel. He started his career as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He’s served as Editor in Chief of EDN Magazine and Microprocessor Report and was the founding editor of Wind River’s Embedded Developers Journal. He has extensive design and marketing experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.