Got burning questions about Platform Designer in Intel® Quartus® Prime design software? Get ‘em answered during “Office Hours” on November 19

On November 19th at 8:00 am Pacific Time, Intel will hold an online “Office Hours” session titled “Creating Designs using Platform Designer.”  Platform Designer is the system integration tool found in the Intel® Quartus® Prime design software for Intel® FPGAs. Platform Designer simplifies the task of defining and integrating custom IP components into your FPGA design.

During this “Office Hours” event, you’ll be able to ask questions and discuss design techniques with other designers who are using the Platform Designer tool. This is not a Webcast where information flows only one way; It’s an interactive discussion session with an Intel Platform Designer tool expert.

No matter what level of design experience you have, please attend. Everyone is welcome to come and ask questions.

Got a burning question or several questions? Come to “Office Hours” and have them answered.

This session of “Office Hours” will be run by Steven Strell, who has been in the Intel FPGA Training group for 13 years – so he has plenty of experience. His expertise spans the many hardware design tools found in Intel Quartus Prime design software, including Platform Designer and debugging tools like the Signal Tap Embedded logic analyzer.

Come to “Office Hours” and ask your burning questions about creating designs using Intel FPGAs, Intel Quartus Prime design software, and Platform Designer.

 

To sign up and reserve your place for the “Creating Designs using Platform Designer” Office Hours, click here.

 

Note: Intel is planning additional online “Office Hours” sessions covering other FPGA-related topics, to be held in the very near future. Here’s the tentative schedule:

  • December: Debugging Designs with Signal Tap Logic Analyzer
  • January: Using Design Assistant to get to Timing Closure

 

 

Notices & Disclaimers

Intel technologies may require enabled hardware, software or service activation.

No product or component can be absolutely secure.

Your costs and results may vary.

© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others.

 

Published on Categories IP, QuartusTags ,
Steven Leibson

About Steven Leibson

Be sure to add the Intel Logic and Power Group to your LinkedIn groups. Steve Leibson is a Senior Content Manager at Intel. He started his career as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He’s served as Editor in Chief of EDN Magazine and Microprocessor Report and was the founding editor of Wind River’s Embedded Developers Journal. He has extensive design and marketing experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.