Free Webinar: Using Intel® oneAPI™ to Achieve High-Performance Compute Acceleration with FPGAs

Interested in learning how to use the Intel® oneAPI™ open, unified programming model to accelerate data-centric workloads using FPGAs? Then sign up for the free Webinar titled “Using Intel oneAPI to Achieve High-Performance Compute Acceleration with FPGAs.” It’s being presented on March 23 and March 25 by Intel and Bittware. The Webinar will zero in a real-world, 2D FFT workload accelerated by BittWare’s 520N-MX PCIe acceleration card based on the Intel® Stratix® 10 MX FPGA. This Intel FPGA incorporates high-performance HBM2 memory, which delivers additional acceleration speed.

The Webinar will discuss:

  • How the Intel oneAPI unified programming model enables easier, software-like FPGA workload acceleration development
  • A look at BittWare’s accelerated 2D FFT code
  • A discussion of various development tools including the Intel® Vtune™ Profiler, which optimizes application performance, system performance, and system configuration for HPC, cloud, IoT, media, storage, and more
  • A preview of next-generation acceleration cards like BittWare’s IA-840F, which is based on the Intel® Agilex™ FPGA.
  • A live Q&A with the Webinar’s four panelists from Intel and Bittware

 

Intrigued? Register for either Webinar by clicking the links below:

 

Tuesday March 23: 8:30am UK/4:30am Eastern (time targets EU/Asia)

 

Thursday March 25: 6:30pm UK/2:30pm Eastern (time targets Americas)

 

 

 

 

Note: If you can’t make the live event, register anyway and you will get access to the on-demand Webinar recording.

 

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Published on Categories Acceleration, Agilex, oneAPI, StratixTags , , ,
Steven Leibson

About Steven Leibson

Be sure to add the Intel Logic and Power Group to your LinkedIn groups. Steve Leibson is a Senior Content Manager at Intel. He started his career as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He’s served as Editor in Chief of EDN Magazine and Microprocessor Report and was the founding editor of Wind River’s Embedded Developers Journal. He has extensive design and marketing experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.