Free Webinar: Offload Hyperscale DDoS Attacks to SmartNICs and see a 300X performance improvement. July 30

Distributed Denial of Service (DDoS) attacks are increasing in size, complexity, and severity. Service providers demand virtual security solutions that offer flexible and robust defenses against these increasingly frequent attacks. The F5 Networks BIG-IP VE for SmartNICs solution instantiated on an Intel® FPGA Programmable Acceleration Card N3000 can handle large DDoS attacks – as much as 300X larger – than software-only implementations while reducing TCO by approximately 47%. Now you can learn more about this powerful cloud and enterprise security solution in a free Webinar being held on July 30. The Webinar is jointly sponsored by F5 and Intel.

Click here for more details and registration information.

 

For additional details about this solution, see “F5 Networks BIG-IP VE for SmartNICs uses Intel® FPGA Programmable Acceleration Card N3000 to efficiently block incoming DDoS attacks in cloud environments while lowering TCO.”

 

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Intel does not control or audit third-party data.  You should consult other sources to evaluate accuracy.

Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors.

Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions.  Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products. For more complete information visit www.intel.com/benchmarks.

Performance results are based on testing as of dates shown in configurations and may not reflect all publicly available ​updates. See backup for configuration details. No product or component can be absolutely secure.

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Published on Categories Acceleration, Cloud, Networking, PACTags , , ,
Steven Leibson

About Steven Leibson

Be sure to add the Intel Logic and Power Group to your LinkedIn groups. Steve Leibson is a Senior Content Manager at Intel. He started his career as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He’s served as Editor in Chief of EDN Magazine and Microprocessor Report and was the founding editor of Wind River’s Embedded Developers Journal. He has extensive design and marketing experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.