Convert from HDR to SDR video on the fly with an FPGA-based video-conversion solution from the bcom Technology Research Institute

The human eye has an instantaneous dynamic range of approximately 10 to 14 stops of dynamic range. Standard dynamic range (SDR) video with 8 bits per subpixel and high dynamic range (HDR) video with 10 bits per subpixel have a dynamic range of eight and 10 stops per subpixel respectively, so it’s no wonder that consumers show a growing preference for HDR imagery. Consequently, 4K HDR video equipment sales volumes are booming. However, many, many legacy SDR televisions, monitors, and phones are still in use, so broadcasters and other video content providers must support multiple video formats to accommodate these legacy video display devices. Often, this support requires storage of video content in multiple forms and at multiple display resolutions. Because video content consumes large amounts of storage capacity, the need to store several versions of the same video greatly increases storage costs.

Real-time video conversion from one format to another eliminates the need to store multiple versions of video files but requires enough computing horsepower to convert and transmit simultaneous HDR and SDR video streams. An on-the-fly video-conversion solution from the b<>com Technology Research Institute can deliver multiple, simultaneous video streams in both HDR and SDR formats using the Intel Acceleration Stack in conjunction with Intel® Xeon® CPUs and the Intel® Programmable Acceleration Card (PAC) with Intel® Arria® 10 FPGA.

The b<>com HDR/SDR video-conversion solution can convert recorded and live video from HDR to SDR video formats on the fly. The solution is now available as a verified acceleration function (AFU) within the Intel Acceleration Stack. The b<>com solution can:

 

  • Convert HDR video into legacy SDR formats
  • Mix live HDR and SDR video sources, which is useful at live events such as sporting events
  • Allow simultaneous monitoring of multiple screen resolutions during video production

 

For more technical details, see the Solution Brief titled “Solving HDR to SDR Video Conversion Challenges.”

 

For more information about other FPGA-based video solutions from Intel, click here.

 

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Published on Categories Acceleration, Arria, VideoTags , ,
Steven Leibson

About Steven Leibson

Be sure to add the Intel Logic and Power Group to your LinkedIn groups. Steve Leibson is a Senior Content Manager at Intel. He started his career as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He’s served as Editor in Chief of EDN Magazine and Microprocessor Report and was the founding editor of Wind River’s Embedded Developers Journal. He has extensive design and marketing experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.