Category: Acceleration

• New Video: Intel® FPGA Partner Program members rENIAC and Megh Computing discuss expectations for Intel® oneAPI toolkits, heterogeneous computing workloads Intel® oneAPI products will deliver the tools needed to deploy applications and solutions across a mix of scalar, vector, matrix, and spatial (SVMS) architectures – respectively CPUs, GPUs, specialized accelerators, and FPGAs. The Intel oneAPI set of toolkits—a base kit and specialty add-ons—simplify heterogeneous programming and help developers improve efficiency and innovation. A short, new video highlights CEOs from two...
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• Why the Intel® FPGA Partner Program matters to partners and to their customers Contributed by Lakecia Gunter, Vice President, Ecosystem Development and Operations, Intel Corporation   Companies no longer compete one-on-one. Today, it's ecosystem versus ecosystem. The broadest ecosystem in which partners come together to develop and build solutions that deliver groundbreaking capabilities and solve key operational, technological, or business pain points will deliver the solutions that customers prefer. That is why Intel...
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• VMware vSphere 6.7 now supports the Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA According to this VMware blog published in January, VMware has expanded its array of supported hardware accelerators in its vSphere hypervisor to include support for the Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA (Intel® PAC with Intel® Arria® 10 GX FPGA). Why? The VMware blog explains: “The highly parallel architecture of FPGAs allows for higher performance, lower...
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• Prevent DDoS attacks with the F5 BIG-IP Advanced Firewall Manager Smart Virtual Edition (AFMVE) integrated with an Intel® FPGA Programmable Acceleration Card (PAC) N3000 The transition to 5G infrastructure will likely increase the risk of a new series of Distributed Denial-of-Service (DDoS) attacks. While DDoS attacks range from targeted acts of retaliation, protest, theft, or extortion to pranksters, they all have one objective: disrupt service availability and reduce the ability of a business to function. Service providers building 5G infrastructure must implement a strategy...
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• Open vSwitch for NFVi based on Intel® FPGA Programmable Acceleration Card (Intel FPGA PAC) N3000 achieves first-packet learning rate of 500K rules/sec, near-wireline performance As the numbers of subscribers, competitors, and technology advances grow, communications service providers (CoSPs) need to differentiate their products and services while keeping improved power efficiency and the need to control total cost of ownership (TCO) as ever-present goals. Intel and HCL have addressed these challenges with a joint solution that combines Intel® hardware and HCL software. HCL has created...
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• Hardware Acceleration and Segment Routing over IPv6 (SRv6) help CoSPs Optimize and Simplify their Networks Communications service providers (CoSPs) are seeking ways to differentiate themselves and to enhance their customers’ experiences in the fast-evolving telecommunication (telco) market—all while keeping costs under control. Exponential traffic growth and constant pressure to add more services and subscribers can tax legacy infrastructure, forcing CoSPs to constantly optimize and simplify their networks. Many CoSPs have deployed network functions virtualization (NFV)...
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• What’s Needed to Fully Realize the Promise of Heterogeneous Computing in Datacenters? By Hua Xue, Vice President and General Manager, PSG Software Engineering, Intel Corporation   The following guest blog is based on remarks by Hua Xue during a panel discussion on “FPGA Software Innovations” at the recent The Next FPGA Platform event, held last month in San Jose, California.   Heterogeneous platforms are coming to the fore in datacenters, as there's...
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• The New Golden Age for Computer Architecture Demands FPGA Reconfigurability By Jose Alvarez, Senior Director, Intel CTO Office, PSG   The following blog is adapted from a keynote speech that Jose Alvarez presented as the recent The Next FPGA Platform event, held in San Jose, California.   Professors John Hennessy and Dave Patterson gave a fantastic talk when they accepted their Turing Award from the Association of Computing Machinery (ACM)...
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• Need to program CPUs, GPUs, FPGAs, and other hardware accelerators in the datacenter? Got four minutes for a simplified OneAPI video explanation? Perhaps you didn’t have time yesterday to watch the 30-minute video showing Intel VP Bill Savage discussing the oneAPI initiative, the beta release of the Intel® oneAPI Toolkits, and the associated Data Parallel C++ (DPC++) programming language, at last November’s Intel HPC Developer Conference. Maybe you don’t have time to watch a 30-minute video at all, but you’re curious about...
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• Want a preview of the Intel keynote at The Next FPGA Platform Event? The Next Platform just published one Next week, The Next FPGA Platform event takes place in downtown San Jose. This day-long event includes several talks and panels devoted specifically to datacenter topics with an emphasis on FPGA acceleration. Several speakers and panelists from Intel will be there and Timothy Prickett Morgan, co-editor and co-founder of The Next Platform, has just published an article titled “Covering All...
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