Category: Acceleration

• What’s Needed to Fully Realize the Promise of Heterogeneous Computing in Datacenters? By Hua Xue, Vice President and General Manager, PSG Software Engineering, Intel Corporation   The following guest blog is based on remarks by Hua Xue during a panel discussion on “FPGA Software Innovations” at the recent The Next FPGA Platform event, held last month in San Jose, California.   Heterogeneous platforms are coming to the fore in datacenters, as there's...
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• The New Golden Age for Computer Architecture Demands FPGA Reconfigurability By Jose Alvarez, Senior Director, Intel CTO Office, PSG   The following blog is adapted from a keynote speech that Jose Alvarez presented as the recent The Next FPGA Platform event, held in San Jose, California.   Professors John Hennessy and Dave Patterson gave a fantastic talk when they accepted their Turing Award from the Association of Computing Machinery (ACM)...
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• Need to program CPUs, GPUs, FPGAs, and other hardware accelerators in the datacenter? Got four minutes for a simplified OneAPI video explanation? Perhaps you didn’t have time yesterday to watch the 30-minute video showing Intel VP Bill Savage discussing the oneAPI initiative, the beta release of the Intel® oneAPI Toolkits, and the associated Data Parallel C++ (DPC++) programming language, at last November’s Intel HPC Developer Conference. Maybe you don’t have time to watch a 30-minute video at all, but you’re curious about...
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• Want a preview of the Intel keynote at The Next FPGA Platform Event? The Next Platform just published one Next week, The Next FPGA Platform event takes place in downtown San Jose. This day-long event includes several talks and panels devoted specifically to datacenter topics with an emphasis on FPGA acceleration. Several speakers and panelists from Intel will be there and Timothy Prickett Morgan, co-editor and co-founder of The Next Platform, has just published an article titled “Covering All...
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• Want a longer, more detailed explanation of the oneAPI unified programming model? Here’s a 30-minute video Last November at the Intel HPC Developer Conference, which was co-located with Supercomputing 2019 in Denver, Intel announced the oneAPI initiative plus a beta release of the Intel® oneAPI Toolkits and the associated Data Parallel C++ (DPC++) programming language that allows developers to target CPUs, GPUs, FPGAs, and other hardware accelerators with one source-code document. (See “Intel announces open oneAPI...
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• The Next Platform discusses Gen-Z coherent memory, UPI, and FPGAs for server architecture acceleration Last November at Supercomputing ’19 (SC19), the Gen-Z Consortium booth contained a proof-of-concept (POC) SQLite database acceleration demo that showed a 5x performance improvement in the average database INSERT operation time, with a clear path to even better performance. (See “Gen-Z Consortium demos 5x SQLite database acceleration at SC'19 with an Intel UPI link between an Intel® Xeon CPU and...
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• Toyota sees 2x to 3x performance gains in PostgreSQL/PostGIS performance using FPGA-enabled servers and Swarm64 DA In two benchmarks run by Toyota, Swarm64 DA (Database Accelerator) used in conjunction with a server containing an Intel® Programmable Acceleration Card (PAC) with Intel Arria® 10 GX FPGA boosted open-source PostgreSQL/PostGIS performance by a factor of 3x and delivered more predictable query performance (with 35x less latency variance) under concurrent loads. Swarm64 DA is an FPGA-accelerated, PostgreSQL relational database...
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• FPGA Acceleration in the Datacenter: See and Hear High-Level Experts from Intel and FPGA Partners at The Next FPGA Platform Day-Long, Live Event – January 22 in San Jose The technology Web site The Next Platform delivers regular, ongoing coverage of high-end enterprise computing, supercomputing, hyperscale data centers, and public clouds as well as frequently covering FPGAs and programmable logic as acceleration platforms for these applications. Now, The Next Platform is breaking through its usual online delivery of information via computer, tablet, and phone screens to create its first-ever,...
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• Build efficient 5G and 4G telecom offload functions quickly using Netcope Technologies’ P4 service and Intel® FPGA Programmable Acceleration Cards Smart Network Interface Cards (SmartNICs) can boost performance in mobile telecom networks. For 4G networks, SmartNICs can be used to implement many network functions in virtual machines or containers rather than using dedicated hardware, resulting in better performance and more network flexibility. Meanwhile, 5G networks will demand even more performance and flexibility, and SmartNICs can meet these goals. An Intel®...
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• Convert from HDR to SDR video on the fly with an FPGA-based video-conversion solution from the bcom Technology Research Institute The human eye has an instantaneous dynamic range of approximately 10 to 14 stops of dynamic range. Standard dynamic range (SDR) video with 8 bits per subpixel and high dynamic range (HDR) video with 10 bits per subpixel have a dynamic range of eight and 10 stops per subpixel respectively, so it’s no wonder that consumers show a growing preference...
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