Can the new Intel® eASIC™ devices help you reach your 4G and 5G equipment design goals?

By Ronnie Vasishsta, VP and GM, Intel Corporation

 

There is a lot of discussion in the industry today surrounding 5G telecommunications and networking. I even see television commercials about 5G popping up more and more. What’s lost in all the excitement about 5G is that the 4G and 4G Advanced Pro standards are still in the deployment phase – and the equipment is still evolving. Many current telecom and networking use cases can be met with these existing 4G solutions and they serve as a bridge to 5G. As a result, vendors are now developing flexible equipment that can implement 4G standards now, with an eye towards reconfiguring them to 5G later.

What 5G adds is not just new technologies but also new business models. Yes, 5G offers enhanced speed on mobile broadband, but the 5G technologies also add some new use cases. For example, some of these new use cases take advantage of new 5G capabilities such as massive machine-to-machine communications that are being used to facilitate smart factories, autonomous driving, enhanced video analytics, more accurate location tracking and a plethora of others. So 5G brings new capabilities, new use cases, and enhanced speed to the networking and telecom markets.

Because these generational transitions from 4G to 5G are happening so quickly, and because 4G itself is evolving with new technologies such as massive MIMO, millimeter wave, beamforming, and carrier aggregation, it’s very hard for 4G and 5G equipment vendors to work with a fixed set of hardware solutions. Equipment vendors’ customers are looking for adaptable, configurable solutions to meet the changing needs of their customers. These solutions often must not only be software-configurable; they must take advantage of configurable hardware – meaning reconfigurable silicon – to meet some of the new technology latency, performance, power and cost requirements of these increasingly advanced networks.

Intel is ideally situated to aid equipment vendors and their customers with this transformation as various 4G deployments and 5G standards are released. Intel software- and hardware-programmable products allow customers to accommodate the constant need for network reconfiguration while still maintaining performance, power, and cost targets. For these 4G and 5G applications, Intel® Xeon® CPUs, Intel® FPGAs, Intel® eASIC devices, and Intel® ASICs are very complementary products.

Intel FPGAs can very efficiently implement certain functions within specific telecom and networking standards while offering benefits in terms of performance and cost. These FPGAs give equipment makers the option to quickly accelerate network functionality to an Intel FPGA sitting immediately adjacent to the Intel Xeon CPU. This migration option is especially attractive when Intel Xeon CPU cycles can better be used for revenue-generating tasks rather than for lower-level tasks.

More efficiencies can be gained by moving the offloaded functions from the Intel FPGA to an Intel eASIC structured ASIC as designs mature and as feature sets solidify. Intel eASIC devices allow reuse of IP from FPGA-based designs and can cut power consumption by as much as 50% at the same clock frequency relative to the same designs implemented in FPGAs while also lowering unit costs. In addition, developing a design using an Intel eASIC device requires only half of the time needed to develop an ASIC with similar capabilities. The broad offering of Intel Xeon CPUs, Intel FPGAs, Intel eASIC devices, and Intel ASICs really gives equipment vendors the ability to carefully manage their product life cycles as their designs pass through various product phases from prototypes, to early production, to mature production volumes.

Intel has introduced the next generation of Intel eASIC devices, code-named Diamond Mesa. These new Intel eASIC Diamond Mesa devices will consume less power and will be faster than the existing Intel eASIC N3XS products. In addition, these new Intel eASIC Diamond Mesa devices incorporate a multicore, embedded, hard processor subsystem, which means that these devices can implement control functions as well as well as many DSP and networking functions on a single device. The hard processor subsystem incorporated into the Intel eASIC Diamond Mesa devices allows the identical software to operate on both the new Intel® Agilex™ SoCs and the Intel eASIC Diamond Mesa devices. Structured ASICs like Diamond Mesa balance the configurability and fast time-to-market of FPGAs with the power-efficient, purpose-built performance of custom ASICs, and are a key piece of Intel’s 5G solution portfolio.

Software and hardware portability across devices is a hallmark of Intel FPGAs and Intel eASIC devices. Significant know-how developed over many years permits Intel to migrate FPGA-based designs into an Intel eASIC structured ASIC quickly and easily while reusing much of the IP. In addition, Intel is moving some of the migration work to automated tools, which makes the process even faster and easier. However, your design need not target an Intel FPGA for easy migration to an Intel eASIC device. Intel has developed techniques to migrate designs from any vendor’s FPGA into Intel eASIC structured ASICs.

Some customers that are familiar with Intel eASIC structured ASIC devices already target these devices directly for specific end products without ever targeting an FPGA. (Or, perhaps the FPGA is used for prototyping, in preparation for a conversion to an Intel eASIC device.) In such cases, a tool flow called eTools, which combines several in-house hardware development tools created by Intel, eases migration and helps customers implement their designs directly in the Intel eASIC fabric. It’s also possible to migrate from an eASIC device to a full-mask-set ASIC should the project’s power or unit-cost goals require it.

Networking and telecom equipment OEMs and companies building out 4G and 5G infrastructure networks should review the full line of Intel semiconductor and IP products in the light of their cost and power targets to determine how to best take advantage of the full breadth of the unique Intel device offerings. These products help equipment vendors  put multiple products with the right bill of materials and the right price point into the market quickly for those with limited R&D budgets.

 

 

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Published on Categories 5G, Communications, eASICTags , ,
Steven Leibson

About Steven Leibson

Be sure to add the Intel Logic and Power Group to your LinkedIn groups. Steve Leibson is a Senior Content Manager at Intel. He started his career as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He’s served as Editor in Chief of EDN Magazine and Microprocessor Report and was the founding editor of Wind River’s Embedded Developers Journal. He has extensive design and marketing experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.