Biz Tech thought leader Dez Blanchfield’s recent podcast discusses infrastructure and application acceleration using FPGAs, SmartNICs, and Intel® eASIC™ structured ASICs with Intel’s Jim Dworkin

Business and digital transformation strategy thought leader Dez Blanchfield regularly posts podcasts in a series titled “Conversations with Dez” about topics of interest to the technology industry. He recently interviewed Jim Dworkin, Senior Director of the Cloud Business Unit in the Programmable Solutions Group at Intel and the two have a wide-ranging discussion that touches on data center architecture and making FPGAs easier to use to accelerate various workloads at scale within the data center. The two also discuss the roles of FPGA-based SmartNICs, which can “hard wire” data flows within the data center to build strategic pathways to reduce data movement, accelerate processing rates, speed time to market, and lower total costs of ownership. In addition, their discussion covers the broader use of Intel® FPGAs and Intel® eASIC™ structured ASICs, the new AI-optimized Intel® Stratix® 10 NX FPGA, and the use of Intel® Open FPGA Stack (Intel® OFS) and Intel® oneAPI toolkits to ease the adoption of all forms of Intel® XPU acceleration including FPGAs.

The hour-long interview is now available on SoundCloud. Click here to listen.

 

For more information about the AI-optimized Intel Stratix 10 NX FPGA, see “Intel has just announced its first AI-optimized FPGA – the Intel® Stratix® 10 NX FPGA – to address the rapid increase in AI model complexity” and “More details on the Intel® Stratix® 10 NX FPGA, the first AI-optimized Intel® FPGA, now available in a new White Paper.”

 

For more information about Intel OFS, see “Intel® Open FPGA Stack Eases Development of Custom Acceleration Platform Solutions.”

 

For more information about Intel oneAPI, see “Intel’s One API will allow you to write code once, then target many processing resources: CPUs, GPUs, FPGAs, AI engines.”

 

 

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Published on Categories Acceleration, oneAPI, StratixTags , ,
Steven Leibson

About Steven Leibson

Be sure to add the Intel Logic and Power Group to your LinkedIn groups. Steve Leibson is a Senior Content Manager at Intel. He started his career as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He’s served as Editor in Chief of EDN Magazine and Microprocessor Report and was the founding editor of Wind River’s Embedded Developers Journal. He has extensive design and marketing experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.