Altran demonstrates FPGA-based Fronthaul Gateway software framework for 5G at Mobile World Congress Los Angeles

Last week, at Mobile World Congress Los Angeles, Altran demonstrated its disaggregated Fronthaul Gateway software framework for mobile communications networks based, in part, on Intel FPGAs. This software framework allows wireless carriers, network equipment manufacturers (NEMs), and network equipment providers (NEPs) to accelerate large-scale 5G fronthaul deployment in a scalable manner. With 5G technology now driving growth in mobile networking, a massive number of remote radio heads must be deployed to handle the required connectivity, and to accommodate the growing number of connected clients and the rising average bandwidth consumed by each client. These radios are connected through a radio area network (RAN) and, across the operator community, Ethernet has become the RAN connection technology of choice because standardized Ethernet networking equipment and infrastructure reduces fronthaul costs.

However, conventional Ethernet switches are not equipped to handle the real-time and time-critical nature of packetized radio traffic. Ethernet switches used for RAN fronthaul applications must support standards associated with the Common Public Radio Interface (CPRI), the evolved Common Public Radio Interface (eCPRI), and IEEE 1914.3 Radio Over Ethernet (RoE) protocols. Ethernet switches used for these radio fronthaul applications must also accommodate the demanding timing, latency, scheduling, and traffic-shaping requirements as described in the set of deterministic, IEEE 802.1 working group standards collectively called Time Sensitive Networking (TSN).

Altran’s Fronthaul Gateway software framework implements a complete set of Ethernet packet control and management features, along with support for CPRI and eCPRI interfaces and the latest TSN standards to help OEMs, NEMs, and NEPs to meet these complex technology demands, to deliver products quickly within short time windows, and to recover their network upgrade investments within increasingly compressed lifecycles. Altran’s Fronthaul Gateway software framework enables radio packet aggregation from CPRI and eCPRI interfaces for transport over Ethernet networks using IEEE 1914.3 RoE and eCPRI. The framework satisfies demands for low-latency transport and stringent quality of service (QoS), with support for TSN and telecom timing profiles.

Previously, Altran announced that its Fronthaul Gateway software framework supported the Intel® FlexRAN reference architecture, a virtual RAN (vRAN) software reference platform that implements these real-time features using a range of Intel products including Intel® Xeon® Scalable processors, Intel FPGAs, and FPGA-based Intel® Programmable Accelerator Cards (PACs).

“Our decade-long strategic partnership with Intel helps us build ready-to-deploy solutions that can dramatically accelerate time to market for our OEM customers,” said Dominique Cerutti, Chairman and CEO of Altran.

The Altran Fronthaul Gateway software framework also supports full carrier Ethernet features with operations, administration and maintenance (OAM) and protection. It includes IPv4/v6 routing, IP virtual private networks (VPNs) and Ethernet VPN (EVPN) with multiprotocol label switching (MPLS), segment routing and a variety of transport options for deployments that combine fronthaul, mid-haul, and backhaul capabilities.


For more information about Altran’s Fronthaul Gateway software framework, click here.

For more information about the use of Intel FPGAs in 5G applications, click here.


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Steven Leibson

About Steven Leibson

Be sure to add the Intel Logic and Power Group to your LinkedIn groups. Steve Leibson is a Senior Content Manager at Intel. He started his career as a system design engineer at HP in the early days of desktop computing, then switched to EDA at Cadnetix, and subsequently became a technical editor for EDN Magazine. He’s served as Editor in Chief of EDN Magazine and Microprocessor Report and was the founding editor of Wind River’s Embedded Developers Journal. He has extensive design and marketing experience in computing, microprocessors, microcontrollers, embedded systems design, design IP, EDA, and programmable logic.