Intel® Quartus® Prime Pro Edition Version 20.3 Software Now Ready for Download - Intel® Quartus® Prime Pro Edition Version 20.3 Software is now available for download. In addition to functional and security updates, the new development software for Intel® FPGAs incorporates many new features including: Significant Fmax improvements for both Intel® Stratix® 10 and Intel® Agilex™ FPGAs Added ability to pass HDL parameters and IP via RTL...
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New article discusses why FPGAs are a good choice for deep-learning applications and research - Many AI workloads such as image recognition rely heavily on parallelism to achieve good performance. For that reason, early AI researchers swiftly adopted GPUs, which provide significant amount of computational parallelism. GPUs were originally designed to render video and graphics, so they excel at parallel processing and can perform a very large number of arithmetic...
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S2C announces FPGA Prototyping System with 300M ASIC gate capacity based on four Intel® Stratix® 10 GX 10M FPGAs - When it comes to validating next-generation SoC designs in cutting-edge applications such as 5G, AI, and Networking using an FPGA prototyping system… bigger is better. S2C’s new Quad 10M Prodigy Logic System embodies that concept by delivering a platform comprised of four Intel® Stratix® 10 GX 10M FPGAs. Each FPGA delivers 10.2 million logic elements...
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THE LATEST
Supermicro’s new short-depth 2U Ultra SuperServer for 5G and NFV applications incorporates two 2nd Gen Intel® Xeon® Scalable processors and supports the Intel® FPGA PAC N3000 accelerator card - Earlier this month, Supermicro announced a new, short-depth 2U Ultra SuperServer optimized to bring powerful industry-standard platforms to 5G and telecommunications environments. The new 2029U-MTNRV Ultra SuperServer supports two 2nd Gen Intel® Xeon® Scalable processors and the Intel® FPGA Programmable Acceleration Card N3000 (Intel FPGA PAC N3000), which can be used to accelerate 5G and...
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Intel introduces multi-phase, step-down power controller and power stage devices for high-current loads including core rails from 40 A to more than 200 A - Intel has introduced a solution for on-board power rails, including core rails, that incorporates pair of new Intel® Enpirion® power devices. These two new devices make it easy for you to design high-current step-down power converters for power trees with output currents spanning a wide load range from 40 A to more than 200 A,...
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Intel® Quartus® Prime Pro Edition design software suite version 20.1 with support for Intel® Agilex™ FPGAs is ready for download - The latest Intel® Quartus Prime Pro Edition software suite, version 20.1, is now available for download and you’re going to want it for the latest updates, which include the following additions and enhancements to make your design job much easier: The v20.1 release of the Intel® Quartus® Prime Pro Edition Software provides support for...
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Ayar Labs and Intel demo FPGA with optical transceivers in DARPA PIPES project: 2 Tbps now, >100 Tbps is the goal - The US Defense Advanced Research Projects Agency (DARPA), has announced that researchers from Intel and Ayar Labs have demonstrated early progress towards improving chip connectivity using photonic interconnect under DARPA’s Photonics in the Package for Extreme Scalability (PIPES) program, which is exploring ways to expand the use of optical components to address the performance, efficiency,...
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New Video: Intel® FPGA Partner Program members rENIAC and Megh Computing discuss expectations for Intel® oneAPI toolkits, heterogeneous computing workloads - Intel® oneAPI products will deliver the tools needed to deploy applications and solutions across a mix of scalar, vector, matrix, and spatial (SVMS) architectures – respectively CPUs, GPUs, specialized accelerators, and FPGAs. The Intel oneAPI set of toolkits—a base kit and specialty add-ons—simplify heterogeneous programming and help developers improve efficiency and innovation. A short, new...
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Why the Intel® FPGA Partner Program matters to partners and to their customers - Contributed by Lakecia Gunter, Vice President, Ecosystem Development and Operations, Intel Corporation Companies no longer compete one-on-one. Today, it's ecosystem versus ecosystem. The broadest ecosystem in which partners come together to develop and build solutions that deliver groundbreaking capabilities and solve key operational, technological, or business pain points will deliver the solutions that customers...
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VMware vSphere 6.7 now supports the Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA - According to this VMware blog published in January, VMware has expanded its array of supported hardware accelerators in its vSphere hypervisor to include support for the Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA (Intel® PAC with Intel® Arria® 10 GX FPGA). Why? The VMware blog explains: “The highly parallel architecture of FPGAs...
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New Video Demonstrates 116 Gbps PAM4 Transceiver Test Chip for Intel® Agilex™ I-Series FPGAs - A new Intel video shows the latest performance results for a high-speed, long-reach (LR) transceiver test chip operating at 116 Gbps with PAM4 modulation. The transceiver test chip, which is built with Intel 10 nm process technology, complies with the highest data rates of the CEI-112G-LR-PAM4 specification. The test chip’s 116 Gbps operation demonstrates the...
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Prevent DDoS attacks with the F5 BIG-IP Advanced Firewall Manager Smart Virtual Edition (AFMVE) integrated with an Intel® FPGA Programmable Acceleration Card (PAC) N3000 - The transition to 5G infrastructure will likely increase the risk of a new series of Distributed Denial-of-Service (DDoS) attacks. While DDoS attacks range from targeted acts of retaliation, protest, theft, or extortion to pranksters, they all have one objective: disrupt service availability and reduce the ability of a business to function. Service providers building 5G...
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Open vSwitch for NFVi based on Intel® FPGA Programmable Acceleration Card (Intel FPGA PAC) N3000 achieves first-packet learning rate of 500K rules/sec, near-wireline performance - As the numbers of subscribers, competitors, and technology advances grow, communications service providers (CoSPs) need to differentiate their products and services while keeping improved power efficiency and the need to control total cost of ownership (TCO) as ever-present goals. Intel and HCL have addressed these challenges with a joint solution that combines Intel® hardware and...
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