Principal Industry Analyst Patrick Moorhead Explores Infrastructure Processing Units (IPUs) on Forbes.com - Navin Shenoy, Executive VP and GM for the Data Platforms Group at Intel, presented a vision for Infrastructure Processing Units (IPUs) earlier this week in a keynote speech titled "Why You Have Been Thinking About the Future of the Data Center All Wrong" at The Six Five Summit, a strategy event presented by Patrick Moorhead’s...
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Want to know more about how Infrastructure Processing Units (IPUs) are revolutionizing data center architecture? A 4-minute video provides clarity - Yesterday, Intel unveiled its vision for infrastructure processing units (IPUs), programmable networking devices that free up CPU cycles by taking over and intelligently managing system-level infrastructure in data centers. (See “Infrastructure Processing Units (IPUs) intelligently manage and accelerate data center infrastructure.”) The company also announced that IPUs based on Intel® CPUs and Intel® FPGAs are...
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Infrastructure Processing Units (IPUs) intelligently manage and accelerate data center infrastructure - Today during the virtual Six Five Summit, Intel unveiled its vision for infrastructure processing units (IPUs), programmable networking devices designed to enable cloud and communication service providers (CSPs and CoSPs) to reduce overhead and free up CPU cycles by taking over and intelligently managing system-level infrastructure in data centers. IPUs help data centers better utilize...
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Attend a free hour-long session on “Debugging with the Signal Tap Logic Analyzer for Intel® FPGAs,” January 28 - The Signal Tap Logic Analyzer, available in the Intel® Quartus® Prime software, captures and displays the real-time signal behavior designs instantiated in Intel® FPGAs. You can use the Signal Tap Logic Analyzer to probe and debug the behavior of internal signals during normal device operation without dedicating I/O pins to the analyzer and with no...
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Intel’s new technology puts ADCs and DACs operating at 64 Gsamples/sec into packaged FPGAs - Intel has announced new technology that combines FPGA die with high-speed analog chiplets that incorporate both ADCs and DACs operating as fast as 64 Gsamples/sec. With analog sampling rates that fast, this technology represents a revolutionary step towards providing direct RF capability for radar, test & measurement, and wireless communications systems. This heterogeneous system-in-package technology...
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Intel® Quartus® Prime Pro Edition Version 20.4 Software Now Ready for Download - Intel® Quartus® Prime Pro Edition Version 20.4 Software is now available for download. In addition to functional and security updates, the new development software for Intel® FPGAs incorporates many new features including: Partial reconfiguration and encrypted partial reconfiguration bitstream support Intel Stratix® 10 devices Enhanced handling of Intel FPGA designs with large inferred RAM...
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FPGA-based reference design from Algo-Logic and Intel cuts high-speed financial trading latency by 3.8X - Algo-Logic and Intel have developed a high-speed reference framework design that offloads the network stack required for high-speed financial trading to logic instantiated in an Intel® Stratix® 10 FPGA on the Intel® FPGA Programmable Acceleration Card (Intel® FPGA PAC) D5005 platform. The reference design includes: A fast PCIe interface (the Algo-Logic Fast Data Mover) A...
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Are FPGAs good for accelerating AI? VentureBeat takes a closer look - VentureBeat has just posted an article titled “FPGA chips are coming on fast in the race to accelerate AI” that takes an in-depth look at the use of FPGAs for Artificial Intelligence (AI) applications. The article cites five AI application challenges that FPGAs help to overcome: Overcoming I/O bottlenecks Providing acceleration for high performance computing...
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BittWare’s 520NX Accelerator Card harnesses AI-optimized power of the Intel® Stratix® 10 NX FPGA - BittWare has just announced the 520NX AI Accelerator PCIe card based on the AI-optimized Intel® Stratix® 10 NX FPGA, which incorporates specialized AI Tensor blocks with a theoretical peak computational speed of 143 INT8 TOPS and 8 Gbytes of in-package, stacked high-bandwidth memory (HBM2). In addition to the Intel Stratix 10 NX FPGA’s internal resources,...
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Intel® Open FPGA Stack Eases Development of Custom Acceleration Platform Solutions - The developer’s dilemma for any new FPGA-based acceleration platform, comprising FPGA hardware design, host software stack and application workloads, centers on how much to develop from scratch versus reuse or license. Schedules are often tight and the design team may not have all of the necessary hardware, software, and application development expertise. The new Intel®...
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The Intel® eASIC™ Diamond Mesa structured ASIC technology now has a name: Intel eASIC N5X - The Intel® eASIC™ N5X structured ASIC is the industry's newest and most capable structured ASIC family. This product cuts power consumption and achieves higher performance relative to FPGAs, and ultimately enables faster TTM relative to ASICs. Intel eASIC N5X devices are the first structured ASICs from Intel that leverage Intel innovations such as the hard...
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BittWare IA-840F FPGA Accelerator PCIe Card bristles with high-speed I/O, is based on an Intel® Agilex™ FPGA - The BittWare IA-840F FPGA Accelerator PCIe Card bristles with high-performance I/O capabilities including two QSFP-DD optical cages (together capable of supporting four 100G Ethernet ports), a PCIe Gen4 x16 host interface, and three MCIO expansion ports for diverse applications. The MCIO ports can be used for high-bandwidth, low-latency, board-to-board communications or for high-speed connections to...
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Gold Release of Intel® oneAPI Toolkits arrive in December: One Programming Model for a Heterogeneous World of CPUs, GPUs, and FPGAs - This week at the Supercomputing 2020 (SC20) conference, Intel announced that the gold release of the Intel® oneAPI toolkits will become available next month. The oneAPI industry initiative is creating a unified and simplified cross-architecture programming model that delivers uncompromised performance without proprietary lock-in, while allowing you to integrate legacy code. Intel oneAPI Toolkits allow...
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