Arrow’s Tech Snacks Festival features three delicious presentations to help you develop motion-control, video, and high-performance FPGA applications - This year, Arrow’s 10-day virtual Tech Snacks Festival (June 7-18) will include more than forty snack-sized sessions led by industry experts on topics ranging from AI/ML to Industry 4.0 and the future of automotive electronics. During the festival, you’ll have the opportunity to get some expert help from Intel presenters who will cover three hot...
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FPGA Cloud Connectivity Kit gets you from the Edge to Microsoft Azure IoT quickly - A new FPGA Cloud Connectivity Kit developed by Terasic and Intel and based on the Intel® Cyclone® V SoC FPGA can get you from raw sensor data on the edge to Microsoft Azure IoT in the cloud quickly, with simple tools, simple templates, and open source design examples. Microsoft Azure IoT allows you to connect,...
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IEEE FPGA Workshops and Tutorials featuring Intel speakers, May 9-13 - The virtual 29th IEEE International Symposium On Field-Programmable Custom Computing Machines (FCCM) takes place online from May 9-12. Intel speakers will be presenting several workshops and tutorials at this conference including: Intel FPGA Cloud Services and Remote Learning – Workshop – May 9 AI Optimized Intel® Stratix® 10 NX FPGA – Tutorial – May...
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THE LATEST
Intel® Open FPGA Stack Eases Development of Custom Acceleration Platform Solutions - The developer’s dilemma for any new FPGA-based acceleration platform, comprising FPGA hardware design, host software stack and application workloads, centers on how much to develop from scratch versus reuse or license. Schedules are often tight and the design team may not have all of the necessary hardware, software, and application development expertise. The new Intel®...
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The Intel® eASIC™ Diamond Mesa structured ASIC technology now has a name: Intel eASIC N5X - The Intel® eASIC™ N5X structured ASIC is the industry's newest and most capable structured ASIC family. This product cuts power consumption and achieves higher performance relative to FPGAs, and ultimately enables faster TTM relative to ASICs. Intel eASIC N5X devices are the first structured ASICs from Intel that leverage Intel innovations such as the hard...
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BittWare IA-840F FPGA Accelerator PCIe Card bristles with high-speed I/O, is based on an Intel® Agilex™ FPGA - The BittWare IA-840F FPGA Accelerator PCIe Card bristles with high-performance I/O capabilities including two QSFP-DD optical cages (together capable of supporting four 100G Ethernet ports), a PCIe Gen4 x16 host interface, and three MCIO expansion ports for diverse applications. The MCIO ports can be used for high-bandwidth, low-latency, board-to-board communications or for high-speed connections to...
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Gold Release of Intel® oneAPI Toolkits arrive in December: One Programming Model for a Heterogeneous World of CPUs, GPUs, and FPGAs - This week at the Supercomputing 2020 (SC20) conference, Intel announced that the gold release of the Intel® oneAPI toolkits will become available next month. The oneAPI industry initiative is creating a unified and simplified cross-architecture programming model that delivers uncompromised performance without proprietary lock-in, while allowing you to integrate legacy code. Intel oneAPI Toolkits allow...
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Got burning questions about Platform Designer in Intel® Quartus® Prime design software? Get ‘em answered during “Office Hours” on November 19 - On November 19th at 8:00 am Pacific Time, Intel will hold an online “Office Hours” session titled “Creating Designs using Platform Designer.” Platform Designer is the system integration tool found in the Intel® Quartus® Prime design software for Intel® FPGAs. Platform Designer simplifies the task of defining and integrating custom IP components into your FPGA...
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More details on the Intel® Stratix® 10 NX FPGA, the first AI-optimized Intel® FPGA, now available in a new White Paper - The increasing complexity of AI models and the explosive growth of AI model size are both rapidly outpacing innovations in compute resources and memory capacity available on a single device. AI model complexity now doubles every 3.5 months or about 10X per year, driving rapidly increasing demand in AI computing capability. Memory requirements for AI...
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WaveNet Neural Network runs on Intel® Stratix® 10 NX FPGA, synthesizes 256 16 kHz audio streams in real time - State-of-the-art text-to-speech (TTS) synthesis systems generally employ two neural network models that run sequentially to generate audio. The first model generates acoustic features such as spectrograms from input text. The second model, a vocoder, takes intermediate features from the first model and produces speech. Tacotron 2 is often used as the first model. A new...
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The Next Platform discusses the latest Intel Networking Innovations including new Intel® SmartNICs based on Intel® FPGAs - Last month, Intel introduced several FPGA-based networking innovations, including the Intel® FPGA SmartNIC C5000X platform architecture – designed to meet the needs of Cloud Service Providers. Also announced: the Inventec FPGA SmartNIC C5020X, based on the Intel FPGA SmartNIC C5000X platform, and the Silicom FPGA SmartNIC N5010, a hardware-programmable 4x100G FPGA SmartNIC that combines an...
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Springer and Intel publish new book on DPC++ parallel programming, and you can get a free PDF copy! - Data Parallel C++ (DPC++) is an open-source compiler project based on the Khronos SYCL compiler with a few extensions. It is also the foundation compiler technology for oneAPI, a cross-industry, open, standards-based unified programming model that delivers a common developer experience across accelerator architectures. SYCL is an industry-driven Khronos programming language standard that adds data...
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Intel and University of Massachusetts Lowell pilot FPGA learning for students in the Intel® DevCloud. You can now use these resources too, for free - The COVID-19 pandemic has disrupted everyone’s lives in ways we could never have imagined. For example, the most basic methods of teaching and learning based on group settings are no longer easy or even possible in many locations. The challenge is to deliver high-quality instruction while dealing with the reality of group-learning restrictions. Like all...
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