THE LATEST

• S2C launches Prodigy Logic Systems for prototyping large ASIC designs based on the world’s highest capacity FPGA, the Intel® Stratix® 10 GX 10M - S2C has announced its new line of high-capacity S10 10M Prodigy Logic Systems for ASIC prototyping, based on Intel® Stratix® 10 GX 10M FPGAs. Members of this new ASIC prototyping system family include single-, dual-, and quad-FPGA configurations. A single-FPGA system supports ASIC designs as large as 80 million ASIC gates. S2C is currently shipping...
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• Two free Webinars to cover PCIe Gen4 and Intel® Agilex™ F-Series FPGAs in December - Intel® Agilex™ F-Series FPGAs and SoCs support PCIe Gen4 x16 operation at 16GT/s using a combination of hard and soft IP. Now you have two chances to learn about the architecture and key features of the Intel Agilex F-Series FPGAs’ PCIe Gen4 abilities including endpoint, root port, and transaction layer protocol (TLP) bypass modes; port...
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• PRO DESIGN’s proFPGA quad Intel® Stratix® 10 GX 10M FPGA Prototyping System, based on the world’s highest capacity FPGAs, has a prototyping capacity of 2 billion ASIC gates - PRO DESIGN Electronic Gmbh is the first company to release details of an ASIC and SoC prototyping and verification system based on the just-announced Intel® Stratix® 10 GX 10M FPGA, the world’s highest capacity FPGA with 10.2 million logic elements (LEs). The proFPGA quad Intel® Stratix® 10 GX 10M FPGA Prototyping System incorporates four pluggable...
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• Intel announces open oneAPI initiative and development beta release with Data Parallel C++ language for programming CPUs, GPUs, FPGAs, and other accelerators - On Sunday and the Intel HPC Developer Conference in Denver during his keynote presentation, Intel’s senior vice president, chief architect, and general manager of architecture, graphics, and software Raja Koduri announced the oneAPI initiative, the product beta release, and the Data Parallel C++ (DPC++) programming language that allows developers to target CPUs, GPUs, FPGAs, and...
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• Levyx Xenon Acceleration Framework runs on Intel® Xeon® CPUs, Intel® Optane™ SSDs, and FPGA-based Intel® programmable accelerator cards, speeds HFT model backtesting - Backtesting seeks to estimate the real-world performance of specific high-frequency trading (HFT) strategies or models as if they had been employed during a previous trading period. Levyx developed its hardware-accelerated Risk Analytics Acceleration Framework to help customers realize more profit from an HFT financial model by speeding up the calculations associated with that trading model....
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• Register for Intel® oneAPI Programming Workshops and an FPGA-specific oneAPI Lunch & Learn session next week at SC’19 in Denver - Last June, Intel’s engineering leaders provided an update on Intel’s software project – “One API” – which delivers a unified programming model that allows you to optimize performance for a wide range of data-centric workloads across scalar, vector, matrix and spatial architectures deployed in CPU, GPU, AI, FPGA and other accelerators. (See “Intel’s ‘One API’...
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• Want to see a photo of the world’s highest capacity FPGA, the Intel® Stratix® 10 GX 10M? How about two photos? - Following yesterday’s announcement of the world’s highest capacity FPGA, the Intel® Stratix® 10 GX 10M, with 10.2 million logic elements (LEs), see “Intel announces Intel® Stratix® 10 GX 10M FPGA, world’s highest capacity with 10.2 million logic elements. Targets ASIC Prototyping and Emulation Markets,” some people have asked me whether or not this device is...
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• Intel announces Intel® Stratix® 10 GX 10M FPGA, world’s highest capacity with 10.2 million logic elements. Targets ASIC Prototyping and Emulation Markets - By Patrick Dorsey, Vice President Product Marketing, FPGA and Power Products, Intel Network and Custom Logic Group   Multiple customers have already received operational samples of the new Intel® Stratix® 10 GX 10M FPGA, the world’s densest FPGA with 10.2 million logic elements (LEs), and the device is now in production. This extremely dense FPGA...
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• F5 Networks selected Intel® Stratix® 10 MX FPGAs for its next-gen Application Delivery Controller. Here’s why. - Every year, F5 Networks compiles a survey-driven report on the State of Application Services. This annual report gives us a glimpse of what IT and the networking business will look like over the next year. The report’s first conclusion: 87% of respondents now have multi-cloud architectures, driven by an app-first methodology. Some device, generally a...
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• Good news: Second free Webinar about 2nd Generation Intel® Hyperflex™ Architecture for Intel Agilex™ FPGAs added. November 7 and 12 - The 2nd Generation Intel® Hyperflex™ FPGA fabric incorporated into all Intel® Agilex™ FPGAs boosts Fmax by as much as 40% and cuts power by as much as 40%. Now you can attend one of two free, one-hour Webinars on November 7 or November 12 that discuss this innovation in FPGA design. The November 7 Webinar...
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