The iAbra PathWorks toolkit brings embedded AI inference, real-time video recognition to the edge with Intel® Arria® 10 FPGAs, Intel® Xeon® Gold CPUs, and Intel® Atom® processors - It’s not always easy to get data to the cloud. Multi-stream computer vision applications, for example, are extremely data intensive and can overwhelm even 5G networks. A company named iAbra has created tools that build neural networks that run on FPGAs in real time, so that inference can be carried out at the edge in...
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Arrow Electronics™ develops four complete RF reference platforms based on the Intel® Arria® 10 SoC FPGA and Analog Devices high-speed RF transceivers, ADCs, and DACs - The JESD204B serial interface has become the interface standard of choice for high-speed analog-to-digital and digital-to-analog converters (ADCs and DACs). Intel® FPGAs and Intel® SOC FPGAs are well suited to interface to these converters using this interface and Arrow Electronics™ has developed four JESD204B reference solutions using high-speed analog RF transceivers and converter modules based...
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IEEE 802.1 TSN IP and software from TTTech Industrial now available packaged with selected Cyclone® V SoC FPGAs - Time Sensitive Networking (TSN) is the IEEE 802.1 standard for deterministic packet transmission and handling over Ethernet networks. It is a set of evolving IEEE standards that support a mix of deterministic, real-time and best-effort traffic over fast Ethernet connections; provides precise time synchronization of network nodes using synchronized, distributed local clocks; and serves as...
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THE LATEST
Want a preview of the Intel keynote at The Next FPGA Platform Event? The Next Platform just published one - Next week, The Next FPGA Platform event takes place in downtown San Jose. This day-long event includes several talks and panels devoted specifically to datacenter topics with an emphasis on FPGA acceleration. Several speakers and panelists from Intel will be there and Timothy Prickett Morgan, co-editor and co-founder of The Next Platform, has just published...
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Want a longer, more detailed explanation of the oneAPI unified programming model? Here’s a 30-minute video - Last November at the Intel HPC Developer Conference, which was co-located with Supercomputing 2019 in Denver, Intel announced the oneAPI initiative plus a beta release of the Intel® oneAPI Toolkits and the associated Data Parallel C++ (DPC++) programming language that allows developers to target CPUs, GPUs, FPGAs, and other hardware accelerators with one source-code document....
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The Next Platform discusses Gen-Z coherent memory, UPI, and FPGAs for server architecture acceleration - Last November at Supercomputing ’19 (SC19), the Gen-Z Consortium booth contained a proof-of-concept (POC) SQLite database acceleration demo that showed a 5x performance improvement in the average database INSERT operation time, with a clear path to even better performance. (See “Gen-Z Consortium demos 5x SQLite database acceleration at SC'19 with an Intel UPI link between...
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Toyota sees 2x to 3x performance gains in PostgreSQL/PostGIS performance using FPGA-enabled servers and Swarm64 DA - In two benchmarks run by Toyota, Swarm64 DA (Database Accelerator) used in conjunction with a server containing an Intel® Programmable Acceleration Card (PAC) with Intel Arria® 10 GX FPGA boosted open-source PostgreSQL/PostGIS performance by a factor of 3x and delivered more predictable query performance (with 35x less latency variance) under concurrent loads. Swarm64 DA is...
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FPGA Acceleration in the Datacenter: See and Hear High-Level Experts from Intel and FPGA Partners at The Next FPGA Platform Day-Long, Live Event – January 22 in San Jose - The technology Web site The Next Platform delivers regular, ongoing coverage of high-end enterprise computing, supercomputing, hyperscale data centers, and public clouds as well as frequently covering FPGAs and programmable logic as acceleration platforms for these applications. Now, The Next Platform is breaking through its usual online delivery of information via computer, tablet, and phone...
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Build efficient 5G and 4G telecom offload functions quickly using Netcope Technologies’ P4 service and Intel® FPGA Programmable Acceleration Cards - Smart Network Interface Cards (SmartNICs) can boost performance in mobile telecom networks. For 4G networks, SmartNICs can be used to implement many network functions in virtual machines or containers rather than using dedicated hardware, resulting in better performance and more network flexibility. Meanwhile, 5G networks will demand even more performance and flexibility, and SmartNICs can...
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New Intel White Paper explores FPGA-based security advantage for IoT and Industry 4.0 applications - A new Intel White Paper titled “FPGA-Based Security Solutions,” written in conjunction with security IP supplier Xiphera, explores the use of hardware-based security for the design of new IoT and Industry 4.0 equipment. According to this new White Paper, “the current software-centric approach to addressing security challenges is not directly applicable for Industry 4.0 and...
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Two free Webinars cover the myriad external memory-interface capabilities of the new Intel® Agilex™ FPGA and SoC families - Intel® Agilex™ FPGAs and SoCs give you more interface capabilities for external memories than ever before. Two new, free, 1-hour Webinars provide an overview of the extensive external-memory interfacing capabilities of Intel Agilex FPGA and SoC families and will show you how to integrate different external memory interfaces into your design, including ways to take...
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Convert from HDR to SDR video on the fly with an FPGA-based video-conversion solution from the bcom Technology Research Institute - The human eye has an instantaneous dynamic range of approximately 10 to 14 stops of dynamic range. Standard dynamic range (SDR) video with 8 bits per subpixel and high dynamic range (HDR) video with 10 bits per subpixel have a dynamic range of eight and 10 stops per subpixel respectively, so it’s no wonder that...
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Free, 4-hour Intel® Distribution of OpenVINO™ Toolkit workshops get you free access to the Intel® DevCloud to test your computer vision projects - Attend one of two free, 4-hour, online Intel® Distribution of OpenVINO™ Toolkit workshops and labs, and get free access to the Intel® DevCloud to test your computer vision projects. The workshops are being held on January 7 and 22. The Intel Distribution of OpenVINO Toolkit supports the development of deep-learning algorithms that help accelerate smart...
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