Low-latency key-value store resides in FPGA SRAM, delivers data in a deterministic 500 nsec - Professor John Lockwood sits behind the wheel, piloting his slick electric roadster around a landscape filled with renewable energy sources: wind turbines, solar arrays, and a hydroelectric dam. He’s actually sitting at a simulation console in the Algo-Logic booth at the Supercomputing 2019 (SC’19) conference in the Denver Convention Center, watching the simulated world go...
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S2C launches Prodigy Logic Systems for prototyping large ASIC designs based on the world’s highest capacity FPGA, the Intel® Stratix® 10 GX 10M - S2C has announced its new line of high-capacity S10 10M Prodigy Logic Systems for ASIC prototyping, based on Intel® Stratix® 10 GX 10M FPGAs. Members of this new ASIC prototyping system family include single-, dual-, and quad-FPGA configurations. A single-FPGA system supports ASIC designs as large as 80 million ASIC gates. S2C is currently shipping...
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Two free Webinars to cover PCIe Gen4 and Intel® Agilex™ F-Series FPGAs in December - Intel® Agilex™ F-Series FPGAs and SoCs support PCIe Gen4 x16 operation at 16GT/s using a combination of hard and soft IP. Now you have two chances to learn about the architecture and key features of the Intel Agilex F-Series FPGAs’ PCIe Gen4 abilities including endpoint, root port, and transaction layer protocol (TLP) bypass modes; port...
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THE LATEST
Alorium conjures a world of hardware-accelerated Arduino boards using Intel® MAX® 10 FPGAs - The open-source Arduino has become one of the most widely used embedded architectures for simple projects. The original Arduino boards were based on an 8-bit AVR microcontroller, originally developed by Atmel. The Arduino integrated development environment (IDE) and simplified programming “sketches” based on C++ made embedded programming easily accessible. Recognizing that Arduino code is not...
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Free Webinar: Ready to learn more about the new, faster, lower-power, 10nm Intel® Agilex™ FPGAs? - If you’re ready to learn more about the new 10nm Intel® Agilex™ FPGAs, Intel is conducting two free Webinars about the new devices. The two Webinars, taking place on October 22 and 23 respectively, are conveniently timed for Europe and North America. These Webinars will cover identical material and will discuss: How the new...
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Need lots of memory for your FPGA application? Intel® Agilex™ FPGAs have you covered. - Intel® Agilex™ FPGAs are designed to operate as many as four separate banks of 72-bit wide, DDR4 SDRAM memory at speeds to DDR4-3200 using the FPGA’s on-chip, hard memory controllers and hard memory transceiver ports (PHYs). Each of the Intel Agilex FPGA’s I/O banks combines 96 general-purpose I/O ports and a high-efficiency, hard memory controller....
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Need PCIe Gen4 x16 version 1.0 capability with full PCI-SIG compliance in an FPGA today? Intel® Agilex™ FPGAs can deliver. - A new YouTube video on the Intel FPGA channel describes the successful testing of the PCIe Gen4 x16 I/O capabilities built into Intel® Agilex™ FPGAs. These 10nm devices, now shipping, have successfully demonstrated PCIe Gen4 x16 operation at 16 GTransfers/sec. (They’re also designed to support PCIe Gen5 x16 operation at 32 GTransfers/sec.) The PCIe Gen4...
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InnovateFPGA Design Contest is about to enter its final phases. You should see the impressive lineup of entries. - FPGAs embody so much design versatility that it’s sometimes hard to imagine all the things you might do with them. That does not seem to be true for the clever people who have entered the 2019 InnovateFPGA Design Contest that’s sponsored by Terasic, Intel, Digi-Key, FPT’19 Tianjin, and ISSI. The contest encourages the development of...
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Get free dev boards, win fame and prizes in the Arrow European FPGA contest - Arrow Electronics has launched its Arrow European FPGA Developer Contest and you can get a free FPGA dev board just by entering. But you need to hurry. The Phase 1 application deadline is October 31, 2019. Here’s what you need to do: Click on the link above for details. Choose one of the three dev...
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Intel® Quartus® Prime Design Software version 19.3 Pro Edition update software with new features and additional device support now ready for download - Intel® Quartus® Prime Design Software version 19.3 Pro Edition update software with support for new Intel® Agilex™ FPGAs is now available for download. In addition to Intel Agilex FPGAs, support has been added for several more devices in the Intel® Stratix® 10, Intel® Arria® 10, and Intel® Cyclone® 10 FPGA families and there is additional...
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Intel® Stratix® 10 DX FPGA is first (and only) FPGA on the PCI-SIG System Integrators List for PCIe 4.0 - The P-tile incorporated in the newly announced Intel® Stratix® 10 DX FPGA is the first and currently the only FPGA component-level device listed in the PCI-SIG Integrators List for PCI Express 4.0 (PCIe Gen4). You’ll find it in the “Components: Endpoints” section. The P-tile implements the Intel Stratix 10 DX FPGA’s PCIe Gen4 x16 interface....
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Intel® Stratix® 10 DX FPGAs Accelerate Intel® Xeon® Scalable Processors in Servers and High-End Embedded Systems - Hardware acceleration for servers is becoming increasingly common because these accelerators can perform calculations faster and more efficiently than the same computations running in software. The recently announced, high-performance Intel® Stratix® 10 DX FPGA family has been designed specifically to provide FPGA-based hardware acceleration and memory expansion for next-generation server systems including servers based on...
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EXOSTIV Labs’ IP and probe module support real-time debugging for Intel® Stratix® 10, Intel® Arria® 10, and Intel® Cyclone® 10 FPGAs - EXOSTIV Labs has developed a high-speed way to get insight into your FPGA-based design so that you can catch design bugs before they escape into production. Most developers use JTAG interfaces when debugging their designs. However, the serial JTAG interface was never intended to be used as a high-speed interface to monitor real-time systems. Even...
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