Month: September 2020

• S2C announces FPGA Prototyping System with 300M ASIC gate capacity based on four Intel® Stratix® 10 GX 10M FPGAs When it comes to validating next-generation SoC designs in cutting-edge applications such as 5G, AI, and Networking using an FPGA prototyping system… bigger is better. S2C’s new Quad 10M Prodigy Logic System embodies that concept by delivering a platform comprised of four Intel® Stratix® 10 GX 10M FPGAs. Each FPGA delivers 10.2 million logic elements (LEs), for a combined capacity...
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• Need a power sequencer? Here’s one that sequences as many as 144 voltage rails and fits in an Intel® MAX® 10 FPGA or MAX® V CPLD CPUs, SoCs, FPGAs, and ASICs generally need carefully timed sequencing of voltages on their various power supply rails to safely power up and power down. You can fit a sophisticated, modular power sequencer that controls as many a 144 power rails with configurable power-on and power-off sequencing and timing for each rail inside of an Intel® MAX® 10 FPGA or...
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• Need high-efficiency, high-current, multiphase power supplies for the FPGAs, SoCs, and ASICs in your designs? New Webcast shows you how to design them quickly using Intel® Enpirion® Power Solutions Earlier this year, Intel introduced a pair of new Intel® Enpirion® power devices that make it easy for you to design high-current, multiphase, step-down power converters with output currents spanning a wide load range from 40 A to more than 200 A for FPGA, SoC, and ASIC power trees. These devices combine high conversion efficiency and PCB space savings and...
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• Free Webinar: Unlock the Benefits of Time Sensitive Networking (TSN) with FPGAs in Industrial Applications Time-Sensitive Networking (TSN) – the evolving set of IEEE standards that support a mix of deterministic, real-time and best-effort traffic over fast Ethernet connections – provides precise time synchronization of network nodes using synchronized, distributed local clocks. It’s increasingly being used for smart factories, Industry 4.0, and Intelligent Internet of Things (IIoT) applications. If you want to build TSN into...
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• Free, On-Demand, Online PCB Design Course for Intel® Agilex™ FPGAs and SoC FPGAs When you incorporate an FPGA into your design, you’re adding a powerful design element into the mix. Intel® Agilex™ FPGAs and SoC FPGAs combine the power of heterogeneous architecture, transceiver leadership, and programmable software to deliver higher silicon integration, smaller form factor, and energy efficient compute acceleration for applications from the edge to cloud. However, you do need to get...
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• Terasic DE10-Agilex Accelerator PCIe board combines Intel® Agilex™ F-Series FPGA with four DDR4 SO-DIMM SDRAM sockets and two QSFP-DD connectors If you’re itching to get your hands on the innovative features built into the new family of Intel® Agilex™ FPGAs like the second-generation Intel® HyperFlex™ architecture or the improved DSP capabilities including half-precision floating point (FP16) and BFLOAT 16 computational abilities, then consider the new Terasic DE10-Agilex Accelerator board. This PCIe card combines an Intel Agilex F-Series FPGA with four...
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• Nokia AirFrame Edge Server based on 2nd Gen Intel® Xeon® Scalable CPUs and the Intel® FPGA PAC N3000 suits edge and far-edge cloud RAN, MEC, and 5G deployments Nokia AirFrame open edge servers feature an ultra-small footprint so they fit well in many locations including existing base station facilities and far-edge sites. These compact servers are provisioned with a real-time, OPNFV compatible, OpenStack distribution that provides both low latency and high throughput for cloud RAN and other applications. The software runs atop integrated 2nd Generation Intel® Xeon® Scalable...
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• Release beta09 of Intel® oneAPI Products Now Live – with new programming tools for FPGA acceleration including Intel® VTune™ Profiler Intel® oneAPI products deliver the programming tools needed for a single application development team to deploy high performance solutions across CPUs, GPUs, FPGAs, and other accelerators using either direct programming via Data Parallel C++ (DPC++) or API-based programming. Release beta09 of Intel® oneAPI includes accelerator optimizations across a multitude of tools – including compilers, libraries, and analysis tools – plus...
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• Ready to Use Intel® oneAPI Toolkits with FPGAs? Get ready with this free 6-hour course The Intel® oneAPI Toolkits allow developers to develop, optimize, and deploy algorithms that use Intel FPGAs as look-aside accelerators in computing systems. A free 6-hour class will teach you how to write and compile Data Parallel C++ (DPC++) code that targets Intel® FPGAs. You will learn and practice the Intel oneAPI development flow to: Emulate your code to ensure functionality...
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