Performance Headroom from Squeezing Transistors Down to 32nm

Since the turn of the millennium, I’ve seen advances in chip manufacturing processes — from circuitry measuring 180 nanometers to 130 to 90 to 65 to 45 and now 32nm — and new architectural designs in between. Every time a new chip advancement comes out, I try hooking up with our performance test engineers to get their take on the latest chips.

I visited the test labs in late 2007 when Intel moved to the 45nm process, which used the reinvented transistor using new high-k metal gates to help shrink and limit electrical leakage.

When the 32nm chips were being tested and prepped for their first public demonstration, I got to meet up with Intel VP Steve Smith and PC performance wizard Francois Piednoel.

Here Francios points out a few things like power consumption, new simplified motherboard design and the CPU with integrated graphics on one chip package nestled beneath a single heat sink.

One Response to Performance Headroom from Squeezing Transistors Down to 32nm

  1. Ed Borden says:

    Hoping you guys will have some focus on SFF systems with this stuff! Flying Creek was great and I think Intel could really be steering the industry with more innovation in this area.