posted by Steve Pawlowski on April 30, 2007
First of all, why should we care? The big capability machines are designed not only to do science but also to address a set of problems termed Grand Challenge Problems. A Grand Challenge Problem is simplistically defined as… one that cannot be solved in a reasonable amount of time with today’s computers. – Wikipedia. So there’s a race to build machines that can solve these problems that, by their very definition, have significant economic or social impact. Some examples of these problems include or have included: climate modeling, human genome mapping, semiconductor modeling, vision and cognition to name a few. Some of the Grand Challenge problems will, at some point in the future, require machines with performance on the order of 1 ZETTAFLOP (10^21 FLOPS, that’s equal to one BILLION ASCI Red machines!) Again, taking the compound aggregate growth rate of the large machines and extend that trend into the future, we wouldn’t expect to see such a machine until ~ 2029. Just in time for my 70th birthday.
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tagged: ASCI Red, Grand Challenge Problems, Peta FLOP machine, TFLOP machine, TOP 500
posted by Stacy English on April 25, 2007
Over 5000 technology experts, industry leaders, analysts and media converged on Beijing for the largest Intel Developer Forum ever held in China. It was truly a global event bringing together leading technology organizations from around the world.
IDF was filled with announcements, technical sessions, one on one discussions and amazing demonstrations throughout the event and technology showcase.
Here’s a quick 5-minute tour of Beijing and IDF China below:
Continue below for all of the keynotes & webcasts covered at the event…
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tagged: IDF, Intel Developer Forum, video, webcast
posted by Joe Schutz on April 25, 2007
I would like to tell you why I have the best job at Intel and why I think we are in the most exciting time in the history of computing. Before I do that I would like to start back at the beginning of the personal computer revolution.
I had the pleasure of working on the original 80386 microprocessor, which was launched in 1986. . This was a very exciting project. Everyone in the team was very energized to be part of the project. We definitely knew we were on the brink of something very big. The vast transistor budget available for that project permitted us to build an entire CPU on one chip. We achieved unprecedented performance at a very low cost level. On top of that we were able to easily beat the performance of mini computers, We projected we would exceed the performance of main frame machines within a few generations of microprocessors. Two product generations later we developed the Pentium™ Microprocessor. At that time we know that microprocessors had became the universal building block for computing. In my mind this was a very major milestone in the history of computing.
I had the pleasure to lead the development of quite a number of microprocessors over a 20 year period. I experienced first hand the huge growth in instructions per clock and the increases in clock rate, that advances in silicon process technology enabled. We continued to smash through technology barriers and innovate on many fronts to increase performance. As performance increased, computer usage broadened to new uses, which we now take for granted.
Microprocessors have now touched every aspect of our lives. We all have come to expect that the internet connects us to each other, and makes information available and commerce easy. We take for granted that email is ubiquitous, and that the computer has come to be the place to store and enjoy all kinds of media. This has clearly been a revolutionary change and we are by far not at the end of the revolution.
We are actually starting the next inflection point in the revolution of computing and I would like to illustrate this by example. I recently built a quad core computer for my home. This computer is simply fantastic. I use this computer to edit digital images and convert RAW files. These are demanding tasks for 13 mega pixel images. A single core computer simply gets bogged down doing RAW conversions and some of the more complex image manipulations. This is painfully obvious after a shooting session when there are hundreds of pictures to process, since it can take hours. The quad core computer, with threaded software is so fast; I actually can process the images as fast as I can decide how I want the images to look. Most compute intensive software applications can be written to benefit from the use of multiple cores. The ability to use multiple cores to work on one task is a major break through since performance can be increased simply by implementing more cores in the system. Moore’s Law continues to give us increases in transistor budgets that will bring this technology to increasing numbers of people. The excitement is just as palpable as when we designed the original 80386 microprocessor. The next revolution in computing is developing before our eyes.
My job at Intel is leading a team of talented researcher who are working on ways to accelerate the trend to multiple cores. We are making great progress. It is exciting to be part of this revolution. This is why I always say I have the best job at Intel.
Next time I post I will describe some of the challenges we are working on.
Comments (13)
tagged: parallel programming, Pentium, quad core, research
posted by Dileep Bhandarkar on April 24, 2007
The deep power down state (aka C6) is another interesting and unique feature. We save away the entire processor state for the cores and turn off the caches and put the cores in an extremely low power state. This significantly reduces processor power consumed in idle mode and extends battery life. The OS initiates this with an MWAIT instruction and the CPU works with the chipset VRM to enter the deep power down state. On a wake up event (interrupt), voltage is increased, clocks and CPU state restored and execution begins.
Too frequent transitions to deep power down state can result in energy loss and reduced battery life. The Penryn processor supports intelligent heuristics to recognize when Deep Power Down energy cost is greater than the idle period savings and it demotes OS Deep Power Down requests to C4 state.
To see Steve Fischer’s IDF presentation go to https://intel.wingateweb.com/published/BMAS004/BMAS004_100Eng.pdf
Feel free to post your questions here or on my original post.
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tagged: 45nm, C6, energy efficient, Penryn
posted by Mark Parker on April 18, 2007
The lights came up. Anand Chandrasekher called me from the IDF keynote stage. I walked on stage and Anand introduced the newest McCaslin based Ultra Mobile Devices for 2007.
Their form factors ranged from navigation devices to gaming devices, all capable of running many flavors of OS. Designs were very ingenious, all touch screen capable, you could tell the OEMs and ODMs had obviously spent some time thinking about their design and functionality.
In true Intel fashion we have yet again made things smaller, more powerful, and using much less power than their predecessors. I’ve seen a lot of processor launches in my 14 years, but what I saw today definitely raised the hair on the back of my neck.
Even though I knew what we would be revealing, when Anand pulled a Menlow platform out of his pocket (It had been running the whole time), I got butterflies. What was really COOL about what he was showing is that the particular device, designed by Compal, was running Linux. It was truly the “Internet in your pocket.”
We had the first two working Menlow devices in the world. I have to give my sincere appreciation to the Silverthorne and Poulsbo silicon teams as they have worked countless nights making this happen.
Be sure to check out the video on Google Video
(future product plans and specifications may change and performance may vary)
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tagged: IDF, innovation, Intel Developer Forum, MID, UMD, UMPC
posted by Pat Gelsinger on April 18, 2007
Yesterday was quite a day at the Intel Developer’s Forum (IDF). If you weren’t able to be here to join us you can see the keynotes at http://www.intel.com/idf/. Take a look.
In my keynote I was able to give some details on the performance data of the Penryn, the future Intel Core 2 Duo processor family of products. The numbers are strong. Penryn includes quite a few microarchitecture features that make it a lot more than just a shrink in die size. In particular, the bandwidth-intensive and floating-point applications will benefit from the 1600 front-side bus (FSB) on the next-generation server platform. This platform will be key in areas like workstations and high performance computers. We demonstrated yesterday a more than 45% bandwidth increase. It amazes me we’ve been able to take the FSB this far in speed. I remember when we thought we’d never see it go much past 800 and now we are seeing speeds of 1066, 1333, and even 1600 Megahertz (MHz). Don’t expect much faster though as we make the big move to the new system architecture with Nehalem in 2008.
Nehalem is way cool and our design team is making great progress toward delivering it in 2008. I’m looking forward to giving you a lot more details about it in the future. I also gave the first glimpse of Larrabee, our first tera-scale processor. Solving the programmability of any such highly parallel machines is the key problem and IA programmability is the solution.
Our Intel vPro and now Intel Centrino Pro processor technologies are looking great. I particularly liked being able to demonstrate out-of-band wireless (802.11n) remote manageability. No more wires!
It was great having Sun on the IDF stage for the first time ever. It’s been 84 days since we announced the deal and voilà, we have our first system this quarter; and Caneland, our quad- and dual-core Intel Xeon processor 7300 series for servers, combined with Solaris for Intel Dynamic Power Technology, was a cool first ever demo.
I look forward to your feedback and questions.
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tagged: IDF, innovation, Larrabee, Nehalem, Penryn
posted by Stacy English on April 17, 2007
We’re blogging, Textura Design is here, Podtech, and Chinese bloggers
For webcasts of keynotes, sessions and annoucements check out intel.com/idf.
And much more tagged with IDF Beijing on Google, Technorati, and Flickr.
Also listen to my pal Bryan and I talk about IDF and the blog… see Blogging Beijing by Bike for a fun, tourist view of this great city.
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tagged: bloggers, China, IDF, innovation, Intel Developer Forum
posted by Jeff Demain on April 16, 2007
We’re here in Beijing launching our 2007 Intel Global IDF events. We came because China has the fastest growing economy on the planet. We came for the tremendous potential for adoption of new technology and the emergence of a strong innovative design community. But this is not a sudden jump in a new location, as Intel has been located in China for 22 years.
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tagged: China, IDF, innovation, Intel Developer Forum
posted by Dileep Bhandarkar on April 16, 2007
Hello, this is Dileep Bhandarkar blogging from Beijing, where it is already tomorrow today! There is a lot of buzz here about Penryn. So, what exactly is Penryn?
Penryn is an unincorporated community in Placer County, California, in the United States. Geographic location is 38.852° N 121.169° W.
Penryn granite is noted for its beauty and strength. Mottled in more-or-less equally sized specks of black and white, it appears a medium-to-dark gray in color, at first glance, but takes on an almost bluish-gray hue when viewed in a subdued light or, when wet or polished. This unique stone can be seen in the foundations and walls of a number of California landmarks including The State Capital and the old U.S. Mint in San Francisco.
Source: http://en.wikipedia.org/wiki/Penryn,_California
You could say Penryn rocks!
Penryn is the code name for Intel’s Next Generation Intel® Core™ 2 Family processor microarchitecture. It is also the name of the industry’s first 45 nm microprocessor. It is an improvement on the Core Microarchitecture introduced last year. It delivers more performance at the same clock speed compared to our Core 2 Duo processors. It is a dual core product with a shared 6 MB L2 cache.
Intel’s 45 nm High-K Metal Gate Silicon Technology allows Penryn to run at higher clock frequency than its predecessor. It features 47 new Intel SSE instructions designed to enhance Media, Graphic and Gaming. We have measured >20% perf improvement on existing games compared to today’s fastest dual core processors, and more than 40 percent for gaming and video encoding with Intel SSE4 optimized video encoders. But of course, as with any performance claims “Your Mileage May Vary”.
Penryn-based processors provide faster divide performance with a Fast Radix-16 Divider, roughly doubling the divider speed over previous generations for applications such as scientific computation.
Enhancements to Intel Virtualization Technology speed up virtual machine transition (entry/exit) times by an average of 25 to 75 percent.
Up to 6MB of L2 cache per die (50% larger) enables greater performance across workloads; and increased associativity ( 16 way to 24 way) improves the utilization of the larger cache.
All of this fits in a compact 107 mm2 die featuring 410 million transistors!
Comments (38)
tagged: 45nm, Core 2 Duo, desktop, Dual-Core, microarchitecture, microprocessor, mobile, Penryn, quad core, server, Xeon
posted by Pat Gelsinger on April 15, 2007
Thanks for the early feedback to the blog! A few quick responses to some of the comments before I board my flight to China. As to being more technical – good comment and yes, that is the plan. However, this was more of a launch posting. I’ll be providing a more detailed and technical posting immediately after the keynote next week, More to come. As to IMC and Nehalem – The rumors your heard are in error, however we’re not yet laying out the specific sockets, platforms and partitioning directions at this time. We’ll be providing much great details as we get closer. Talk to you more next week.
Comments (5)
tagged: IDF, innovation, Nehalem
posted by Brady Thomas on April 11, 2007
Moore’s Law gives me twice the number of transistors every 2 years with each new process generation. My goal is to use those transistors to provide greater customer value, which can come in the form of new capabilities or higher performance. Examples of new capabilities can range from virtual address extensions (like the 64 bit extensions introduced a few years ago) or new features like virtualization.
Comments (6)
tagged: extensions, instruction set, microarchitecture, Moore's Law, performance
posted by Pat Gelsinger on April 11, 2007
10 years ago I helped to launch IDF. It was a small gathering of a couple hundred focused on Intel and industry technology directions. We viewed its key purpose as bringing the key technologists of the industry together to jointly set a vision and direction for the industry to pursue together. I’ve affectionately termed it the ‘greatest geek fest on earth’ to never lose that deep sense of the core technical focus of IDF that continues to this day.
What an incredible 10 years its been since we launched IDF. Think of the numerous changes since then in computing, mobility and communications to name just a few. IDF’s grown and become a global event. Collectively the technology innovation we have driven, seen and experienced since then is something we should all be proud of. And this innovation will continue relentlessly into the future, enabling usages and capabilities which were once just science fiction.
I will be at IDF Beijing showing you some of this continuing innovation and excitement in my Enterprise keynote. The other keynotes will be given by Justin Rattner, Eric Kim and Dadi Perlmutter. Deep technical insights will be given on 45nm silicon by Senior Fellow Mark Bohr, and Optimizing Software by Fellow Geoff Lowney. There will be two days of Meet The Experts (access to our Intel Fellows), technical Tracks, Labs, Chalk Talks and the Technology Showcase. I am thrilled to have all of this technology, and technology experts, there for you.
And we have innovative technology to announce….
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tagged: 45nm, IDF, innovation, technology
posted by Genevieve Bell on April 10, 2007
At Intel, my charter is pretty simple and straightforward: provide insights and inspire innovation. My team and I use ethnographic methods and theory, in addition to human factors engineering, cognitive psychology, interaction design and other social science epistemologies to broaden and deepen Intel’s understanding of our current and potential customers – all those people beyond the company walls!
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tagged: ethnography, holidays, home research, techno-determinism, vacation
posted by Nick Knupffer on April 09, 2007
Welcome to “Views” – a new Intel.com blog that we hope provides pure unfiltered spring mountain thoughts from the people who make the Moore’s Law magic and the innovation and performance silicon ignites for all-things digital and connected to the world wide web. Those who will be posting here reflect love of, and expertise in creating technology.
posted by Stacy English on April 09, 2007
This is a new blog space where Intel’s top technologists will be writing about the technologies of today and the future.
Your blog hosts are Stacy English and Jeff Demain. They will be opening the doors into the technology development at Intel and helping you connect with some of the most interesting things going on in the computing industry.
About Stacy and Jeff: Stacy and Jeff drive technology industry programs at Intel, which is the group that brings you the Intel Developer Forum. Stacy has an emphasis on marketing, and Jeff on executive technology programs. Together, we will introduce you to the many technologists, Intel Fellows and Senior Executives that will visit the Technology@Intel blog. You may hear from us occasionally, but the emphasis is on the technologists and that will be the focus of the discussions.
About the Blog: Let’s talk a bit about the intent of this blog, who it’s for, and what we hope together we can accomplish.
* The concept is straight-forward, we love technology and people who love technology. Intel’s senior technologists will be in direct conversation with you.
* We like to think that together as an industry we advance the best ideas forward, learn, and ultimately change the world.
* Together all of us will determine what this blog is about, through your questions, insights and dialogue – the conversation with evolve to meet our collective needs.
* We want to hear from you - What are your views on the future of technology? What are your opinions on computing and communications architecture? What technology usage models are you excited about? What innovations are you passionate about?
This will be a multi-author blog. We’ve lined up a great slate of people that are going to share their insights and ideas about technology. The first blogger will be none-other than Pat Gelsinger, who is widely recognized as the father of the Intel Developer Forum. Followed by Steve Pawlowski, Joe Schutz and Dileep Bhandarkar. Jeff is going to share with you some of the starting line-up of bloggers and a few personal notes about them:
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tagged: IDF, Intel, Intel Developer Forum
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