Results tagged “interconnect”
Randy Mooney on ISSCC: Scaling performance/watt through circuit innovation
posted by Guest Blogger on February 03, 2008 at Research@Intel
As we look forward to enabling exciting new opportunities in platforms ranging from mobile computing to the data center, along with associated new applications, one common denominator of all these products will be the underlying process technology and the circuits...
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tagged: accelerators, circuits, DRAM, interconnect, ISSCC, memory, SRAM, terascale
Inside an 80-core chip: the on-chip communication and memory bandwidth solutions
posted by 杜江凌 (John Du) on July 17, 2007 at Research@Intel
By John Du, reposted from our Chinese language blog. Here I would like to discuss about some hot technical topics. About tera-scale, some readers of the Chinese blog made comments about the communication and the memory bandwidth solutions. I would...
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tagged: 3D stacking, architecture, interconnect, memory, multi-core, research, terascale
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