posted by Ali-Reza Adl-Tabatabai on February 27, 2008
One of the challenges of parallel programming is synchronizing concurrent access to shared memory. Today, programmers use locks for synchronization, but locks have many pitfalls that make them difficult to use for building large, robust, parallel applications. In the past several years, my group has been working on a new synchronization construct called transactional memory. Transactional memory promises to address many of the pitfalls of locks, providing a synchronization construct that supports composing robust parallel applications in a much better way than locks can.
The idea behind transactional memory (TM) is to replace lock-based synchronization with transactions over shared memory. Using a new transactional language construct, the programmer can declare that a particular code block should execute atomically and in isolation, as if the whole block executes in an all-or-nothing fashion without any interference from other threads. Meanwhile, the system under the hood allows multiple transactions to execute concurrently as long as it can still provide the illusion of atomicity and isolation.
Databases have used transactions for decades so the idea of using transactions for concurrency control is not new. TM simply brings some of the ideas that have proven so successful in databases to mainstream programming languages such as C++ and Java, and to future languages that will support parallelism from the ground up.
posted by Timothy Mattson on February 26, 2008
What will people do with their computers in five, ten or twenty years? How will computers need to change to support these future usage models? And finally, how the heck are we going to program these things?
These are the questions that drive us in the Applications Research Lab (and others involved in Tera-scale Computing Research at Intel). We work with the smartest people we can find (both inside and outside Intel) to understand the future. And then we work with the smartest architects we can find to design computers to satisfy these future workloads. Basically, we get paid to imagine the future and then do what it takes to make it happen.
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tagged: many core, parallel programming, PARSEC, terascale
posted by Jeffrey Howard on February 26, 2008
We have written a lot about real time Ray-Tracing on this Intel blog, but so far it might have come across like this technology is out of reach of most consumers. That’s because until recently, we have demonstrated Ray-Tracing at high resolutions, using the most powerful consumer platforms available. These systems had 8 powerful cores worth of the most advanced PC architecture available, running at extreme speeds, and carrying some extreme power budgets.
However, since Intel aims to meet the requirements of many diverse market - from Extreme Performance, all the way down to Extreme Mobility - the Intel research labs are now ready to show how Ray-Tracing can scale to the complete opposite side of the spectrum.
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tagged: graphics, mobility, ray tracing
posted by Guest Blogger on February 24, 2008
In a paper entitled “Cascaded Silicon Raman laser” published today in Nature Photonics (by Haisheng Rong, Shengbo Xu, Oded Cohen, Omri Raday, Mindy Lee, Vanessa Sih, and Mario Paniccia), we report the first experimental demonstration of a cascaded Raman laser produced in silicon and some potential applications, including sensing greenhouse gasses. In this blog, I attempt to explain for general audience what this technology breakthrough is about and how we achieved it.
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tagged: greenhouse gasses, nature, Raman Laser, silicon photonics
posted by Guest Blogger on February 11, 2008
At the Mobile World Congress which begins today in Barcelona, Intel will be showing a demo of our research to perform a heterogeneous seamless handover between a WiFi and WiMAX network. In this blog I will describe our research work to improve and optimize seamless transition across these networks which was done in close collaboration with Nokia R&D and Nokia Siemens Networks R&D.
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tagged: radio, research, Wi-Fi, WiMAX
posted by Guest Blogger on February 03, 2008
Wireless communication is growing so fast that soon it might be difficult to get a decent wireless connection at your favorite coffee shop. At the Communications Circuits Lab of Intel Corporation, we have been doing research on techniques that will allow better wireless connectivity in today’s crowded spectrum environment. Three such works are being presented at the International Solid State Circuits Conference (ISSCC) in San Francisco which begins February 3. In conducting this research, we worked closely with researchers at Georgia Tech, Cornell University and the University of Washington which continues a long trend Intel has of collaborating with academia.
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tagged: ISSCC, radio, research, WiMAX, wireless
posted by Guest Blogger on February 03, 2008
As we look forward to enabling exciting new opportunities in platforms ranging from mobile computing to the data center, along with associated new applications, one common denominator of all these products will be the underlying process technology and the circuits built on that process technology. Providing the building blocks that will enable those platforms and applications is a challenge that we look forward to here in the Circuit Research Lab of Intel’s Corporate Technology Group. Today, I want to discuss four of these building blocks that will be discussed at the International Solid State Circuits Conference.
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tagged: accelerators, circuits, DRAM, interconnect, ISSCC, memory, SRAM, terascale
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