posted by Sean Koehl on September 21, 2007
Thursday, our CTO Justin Rattner gave a keynote on virtual worlds and the emergence of what he called the 3D Internet. The 3D Internet Rattner described is the mushrooming social world of multiplayer online games, of complex animations for medicine and science, of applications such Google Earth, and of virtual worlds such as Second Life. With some 60 million people now participating in virtual worlds such as Second Life, Justin said that “clearly this is not a niche.”
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tagged: Intel, Rattner, research, terascale, virtual worlds
posted by Sean Koehl on September 20, 2007
Following up on Brian’s post yesterday, here’s some pics and info on the Tera-scale demos we have here at IDF.
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tagged: 80-core, Ct, IDF, Intel, ray tracing, research, terascale
posted by Brian McCarthy on September 19, 2007
Here at IDF - Day 2, the technology showcase is going full steam. With lunch being served in the showcase area it is a certain draw for the attendees - kind of like a massive lunch and learn. In the Research and Development pavilion, we are hosting 11 demonstrations of the work that is going on in our labs. Segmented into two tracks, Mobility Research and Tera Scale Research, the pavilion has plenty of content for everyone. Today’s blog will highlight the mobility demonstrations and tomorrow we’ll cover the tera scale theme. Let’s see what’s going on…
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tagged: energy efficient, IDF, mac coordination, mash maker, mashups, research, rootkit, security, spectrum sensing, wisp
posted by Brian McCarthy on September 18, 2007
Your two editors, Sean and I are here in San Francisco for the 2007 IDF. We will do a daily post to showcase highlights of the day and how the research labs are helping lead the way for innovation in the years to come.
This year marks the 10th anniversary of IDF and the highlight so far has to be the interview of Gordon Moore by Moira Gunn. But more on that later. The theme for this year’s IDF is Multiply your Innovation. Innovation is evident everywhere here in Moscone Center. From the announcements in the keynotes such as the first public showing of our 32 nm technology, to the technical sessions and the showcase floor where we see innovation from Intel and many of our partners.
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tagged: energy efficient, Fair online gaming, Gordon Moore, IDF, Moore's Law, research, WiMAX
posted by Sean Koehl on September 17, 2007
As you may have read in Ansheng’s earlier post, our photonics labs recently disclosed a 40 gigabit per second laser modulator. Optical modulators, which encode high speed data onto an optical beam, are something we have been working on in silicon for a while. I actually worked in the lab when we first hit 1Gbps and then 10Gbps, and seeing them finally hit 40G is truly an accomplishment. But in all this time we haven’t said much about the other end of the fiber — how you detect optical data at 40 Gbps and convert the information back into electrical signals which a computer can read.
posted by Anwar Ghuloum (葛安华) on September 17, 2007
A few weeks ago, I blogged on why parallel programming is “hard.” My goal was to set up discussions by others and myself on the Research@Intel blog on how we’re making it easier. While we’re continuing to write about this in some detail, I want to present one vision for making parallel programming easier. I hope this puts into context the work that Intel’s Corporate Technology Group will highlight at the Fall Intel Developer Forum in San Francisco. Ct, TBB, STM, OpenMP might seem like alphabet soup, but they are all designed to address the problems I discussed in distinct and complementary ways. The bottom line is that software is going to be more important than ever as multi-core and tera-scale puts more burden on the programmer to keep up with Moore’s law scaling. So, let’s tackle the problems in the same order I presented them originally.
posted by Brian McCarthy on September 16, 2007
The following post is from a guest contributor to the research blog. This post comes from researcher Rob Ennals who is the project lead on Intel Mash Maker. Rob is based in our Intel Research lab in Berkeley. Prior to joining Intel, Rob received his PhD at Cambridge, UK.
There has been a lot of hype about mashups recently, and with good reason. Mashups are allowing us to transform the Internet from being a collection of separate website islands, into a unified intelligence in which knowledge from one web site can be automatically combined with knowledge from another.
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tagged: IDF, mash maker, mashups, research, Web
posted by Justin Rattner on September 14, 2007
At my Spring 2007 IDF keynote I said that in order to create a new product line for ultra-mobile devices, we have to create processors and chipsets that collectively reduce power by a factor of ten. Taking 2006 as the baseline, our first ultra-mobile processor was a 5-watt ultra-low-voltage design based on our mainstream mobile processor. In 2008, we will meet our decade goal of a 10x reduction in power by introducing a new low-power IA processor and chipset needing only one-seventh the board area of today’s ultra-mobile systems. The reduction in power consumption is the result of a more energy-efficient microarchitecture and a much higher degree of integration. More improvements are coming before the end of the decade that will improve platform-level power management and the efficiency of the voltage regulators.
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tagged: Climate Savers, CTO, energy efficient, IDF, keynote, physical modeling, power delivery, power management, Rattner, research, virtual worlds
posted by Brian McCarthy on September 13, 2007
The following post and paper is from a guest contributor to the research blog. This post comes from Network Software Engineer, Jeongeun Julie Lee of Intel’s Communication Technology Lab where she researches WiMAX interoperability, WiMAX cross-layer MAC optimization, Traffic Modeling, and video over WiMAX. Her research interests include wireless communications, WiMAX MAC optimization, quality of service, sensor networks, and UWB application.
Given the wide use of HTTP traffic models to model user web browsing behavior, it is important that the model be representative of a large variety of traffic and be continually updated to reflect the constantly evolving nature of web content and the exponential growth in number of users. In this paper, we analyzed an extensive set of proxy web server logs to understand changes in network traffic patterns.
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tagged: HTTP, Web
posted by Sean Koehl on September 11, 2007
Recently I was looking over some slides by Intel Fellow Vivek De, which he has put together for his Intel Developer Forum session next week on “Energy Management Innovations for Future Multi-Core Processors.” In the presentation I saw a few slides on something called a “Viterbi accelerator.” This is an interesting technology that ties together various aspects our research which I wanted to mention here.
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tagged: heterogenous cores, Intel, multi-core, research, terascale, viterbi
posted by Jerry Bautista on September 10, 2007
Within the Intel labs we were shocked by the public reaction to our 80 core disclosure last spring. The interest level was astounding, but after the initial discussions (around core type, how they were arranged/interconnected, power vs. teraflops, and the like) a common question came up: “What would you do with 80-cores?” Sean raised this question in an earlier post and we received some great feedback from readers. I’d like to continue to discuss some of possibilities which we are currently looking into.
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tagged: 80-core, Intel, multi-core, physical modeling, research, Stanford, terascale, virtual worlds
posted by Anwar Ghuloum (葛安华) on September 06, 2007
Data parallel programming models have been “in vogue” lately because of their prevalence in GPGPU programming. As I alluded to in my previous blog, there are other reasons we should be looking at data parallelism….but not all of these models are created equal. So, let’s take a tour of data parallel programming and touch on what “nested” and “flat” data parallel models are and what kernel and vector styles are. (If I’m not careful here, you’ll draw the conclusion that Excel comprises a data parallel programming model:)) I’ll use some Ct “syntax” in places, but I’ll try to explain what it means as I go. Warning: There is (mostly correct) code below, but I’ll try to explain what’s going on if you aren’t a programmer.
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tagged: Ct, data parallel, parallel programming
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