Moving massive data efficiently between chips

As more and more aspects of life become digital, humankind is evolving into a data society where information is king. Technology trends including social media, e-commerce, e-science, Big Data and Exascale Computing are driving a need to dramatically increase computational capabilities for servers, datacenters and supercomputers without dramatically increasing power consumption.

At ISSCC 2013, Mozhgan Mansuri of Intel Labs is presenting paper describing chip-to-chip I/O that combines extremely high (terabit per second) data rates, world-class energy efficiency, and the capability to rapidly tune performance vs. power consumption to use the minimum energy at any given time.

As Intel continues to drive Moore’s law and increase the processing capabilities of products such as Xeon and Xeon Phi, many data-intensive applications may become limited not by the processor, but by how fast you can “feed the beast” by moving massive amounts of data between processors or between processors and memory. This work represents the latest advancement to address this issue from our Electronic Signaling Research team led by Bryan Casper.

Mozhgan’s paper details a research prototype capable of moving a total of 1 trillion bits of data per second across a 50cm I/O link (combining the data moving in each direction) while consuming only 2.7 Watts of power. To put a terabit/s in perspective, this speed would be enough to transmit the following in 1 second:

  • Two seasons of a TV drama in 720p HD
  • The contents of a 100GB laptop hard drive
  • An entire music library of 150+ albums

Novel I/O circuits are used to transmit and receive data across a ribbon composed of thin “micro-twinax” cables attached directly to the processor or memory packages with a high-density connector. The ribbon link consists of 32 parallel I/O channels in each direction, each capable of sending 16 Gigabits per second.

The circuits can rapidly tune to lower data rates of 8, 4, or 2 Gbps per channel when needed, further increasing power efficiency by up to 3x. As such, the link can operate a total data rate of 256 Gbps while consuming just over 200 milliwatts of power.

An additional feature is redundant I/O channels to increase link reliability. The extreme density allowed for 4 extra channels in each direction. In practice the link could be tested and configured to use the best 32 of the 36 physical channels.

While still in the research phase, this achievement represents the most dense I/O ever achieved over copper wiring in terms of data transmitted per unit area. Compared to other recently reported results on similar high-bandwidth links, this works represents the best power efficiency at twice the data rate – and at longer link distances. It’s an important step towards enabling future data intensive applications.

Sean Koehl

About Sean Koehl

Sean Koehl is a Vision Strategist for Intel Labs, the global research arm of Intel Corporation. He is responsible for crafting visions of how Intel R&D efforts could impact daily life in the future. He leverages insights from Intel’s technologists, social scientists, futurists, and business strategists to articulate how technology innovations and new user experiences could improve lives and society. Sean received a bachelor’s degree in Physics from Purdue University and launched his career at Intel in 1998. He has worn many hats in his career including those of an engineer, evangelist, writer, creative director, spokesperson, and strategist. He has led a variety of projects and events, authored numerous technology publications and blogs, and holds seven patents. He is based at Intel’s headquarters in Santa Clara, California.

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