Collaborating to create the most energy-efficient supercomputer

Today marks a significant milestone in efficiency for high performance computing (HPC). For the first time, an Intel-based system has topped the Green500 list, an achievement made possible through the use of the new Intel® Xeon Phi™ co-processor launched this week at SC12.

The record-breaking computer, called Beacon, belongs to our collaborators at the National Institute for Computational Sciences (NICS). NICS is a well-known center in high-performance computing, established in partnership with the University of Tennessee and Oakridge National Lab (ORNL).  Beacon is an appropriate name as it lights the way for future systems by achieving 2.5 billion floating point operations per section for each Watt of power consumed (2.5 Gigaflops/W).

Green500 was established in 2007 and ranks high performance computers in terms of energy efficiency: performance per watt. This increased focus on energy consumption is essential to the future of computing from the tiniest mobile devices to the largest supercomputers. It’s particularly vital to the development of practical Exascale computers over the next decade. This result shows the benefit that a significant increase in general purpose, chip-level parallel processing brings to the table with the 60-core Xeon Phi.

While our team was working on our own Green500 submission, it was not easy to find resources and justification to build a large cluster designed specifically to target energy efficiency.  Dr. Glenn Brook at NICS and team had the resources to design a new supercomputer from ground-up aimed at energy efficiency. Intel had the knowledge of Xeon and Xeon Phi algorithmic optimizations needed to achieve the ambitious goals.

Looking back, the progress has been significant. Just four years ago, the highest ranking Xeon cluster on the Green500 list stood at only 265 Megaflops/W.  Today’s achievement represents nearly a 10-fold improvement for Intel Architecture in just four years. This is the latest step in a long journey towards parallel computing and many-core that began over eight years ago – as described in part 1 of our many-core web documentary.

More importantly, in working round the clock towards this goal the team learned much more in the past few months than they could have otherwise.  They developed significant innovations from algorithms to system hardware designs aimed at energy efficiency. This was a top-down, energy efficiency focused effort to co-design every software-hardware element that mattered.

Pradeep Dubey, our Intel Fellow leading the algorithmic innovations also remarked that “this is the most remarkable collaboration story that I can think of in my Intel career so far.” In addition to the work with NICS, the collaboration spanned many teams within Intel product groups and Intel Labs. The team members were also spread across many time zones.  According to Pradeep, this was “yet another proof point of how we can achieve almost anything if truly passionate people collaborate to complement their skills.”

About Sean Koehl

Sean Koehl (@smkoehl) is an Intel Labs Technology Evangelist working to increase awareness of Intel’s technology research and vision for our future data society. Sean joined Intel in 1998 as an engineer working on silicon optical debug and spent the next five years contributing to the design, packaging and testing of silicon photonics devices. He has spent the past decade leading projects and events to evangelize R&D on silicon photonics, many-core, visual computing, Big Data and other areas. Sean received a B.S. in Applied Physics from Purdue University and holds seven patents.

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