Tera-scale Demos at IDF

Following up on Brian’s post yesterday, here’s some pics and info on the Tera-scale demos we have here at IDF.

80-Core Teraflops Research Processor

ts-demo-1.jpg

Here’s Paolo and Nitin, part of the team showcasing the 80-Core Teraflops Research Processor. This represents an important milestone towards enabling future processors with 10s to 100s of cores. It is the first programmable chip to deliver more than one Teraflops of performance, and consumes very little power. This prototype focuses on exploring scalable, energy–efficient designs for future multi–core chips as well as core–to–core interconnect and clocking.

Multi-Core Hardware Emulator

ts-demo-2.jpg

Franz, Elmar and Thorsten are from our Germany labs. Their emulator system enables fast, accurate emulation of future multi-core architectures. Based on FPGA technology, future designs can be prototyped with short turnaround times. It has a rich set of debug features supports analyzing platform performance vs. other designs. They showed an xperimental eight-core Intel Architecture CPU running a real OS on the emulation system.

Safer Software Execution through Log-Based Architectures

ts-demo-3.jpg

Lifeguards, software tools that proactively monitor programs for potential problems, can improve the reliability of end user systems by catching software errors at runtime. Collaboratively, Intel and Carnegie Mellon University are exploring Log-Based Architectures, new hardware enhancements designed to improve lifeguard performance on multi-core processors. Michael and Shimin demonstrated an example enhanced lifeguard detecting a computer virus attack.

Taking Applications Tera-Scale with Ct

ts-demo-4.jpg

Ct, an advanced data parallel programming environment, extends C for throughput computing to maximize programmability and performance of several applications on present and future multi-core platforms. Jane and Mohan compared conventional parallel programming and Ct, specifically for image processing and game physics applications.

Ray Traced Gaming

ts-demo-5.jpg

The ultimate goal for computer-generated graphics is to create photorealistic imagery generated on the fly. Ray tracing models the behavior of light to create shadows and reflections much better and more easily than the techniques used to render interactive 3-D graphics today. Daniel showed that the time is nearing when tera-scale computing will finally make real-time ray tracing possible.

One Response to Tera-scale Demos at IDF

  1. Casey Weltzin says:

    Hi Sean – it’s awesome to see LabVIEW in use in the top picture as part of the 80 core research processor. I would love to talk with you further and even take a look at the code if possible.