Getting Small with Intel CEO at IDF09
posted by Ken Kaplan on September 25, 2009
Intel CEO Paul Otellini kicked off the Intel Developer Forum in a big way talking about the benefits of getting small. He showed a wafer filled with Intel’s first 22nm SRAM test chips.
Here’s what one looks like up close and here are some facts about 22nm, including:
- The 22nm test circuits include both SRAM memory and logic circuits to be used on 22nm microprocessors.
- SRAM cells of 0.108 and 0.092 square microns function in an array totaling 364 million bits. The 0.108 square micron cell is optimized for low voltage operation. The .092 square micron cell is optimized for high density and is the smallest SRAM cell in working circuits reported to date.
- The test chip packs 2.9 billion transistors, at approximately double the density of the previous 32nm generation, in an area as small as a fingernail.
- The 22nm dimensions are patterned with exposure tools using light with a wavelength of 193nm, a remarkable testament to the ingenuity of Intel’s lithography engineers.
- This 22nm technology continues to deliver the promise of Moore’s Law: smaller transistors, improved performance/watt and lower cost per transistor.
A few minutes after his keynote and Q&A with the audience, sat down with CNBC reporter Jim Goldman to talk about the big picture efforts Intel is deeply involved in as the company continues:
- laying the foundation for resurgent growth in computing and driving technology into new areas to create new opportunities
- innovating and integrating to help move the meaning of PC from personal computer to personal computing on any device
Otellini also spoke live with Fox Business News.
Comments (0)
tagged: 22nm, CNBC, IDF09, Intel, Moore's Law, Paul Otellini, Sandybridge
