Vectorization is an industry wide challenge – and if you are interested in seeing some one of the industry leading exploration projects (and trying it on your code)… then may want to look at ispc. ispc is an R&D compiler for a C-based language that is targeted for exploring the performance available from doing SPMD [...] Read more >

We are kicking off a series of OpenCL Webinars this week (they will be available for playback afterwards too). All talks are at 09:00 Pacific Time.  Register for the talks to get a link and optional reminder. July 11: Getting Started with Intel® SDK for OpenCL Applications 2012 July 18: Writing Efficient Code for OpenCL Applications 2012 [...] Read more >

The Top500 List released on June 18, 2012, included preproduction Knights Corner coprocessors in the #150 system. It became the first system on the Top500 list to utilize the Intel Many Integrated Core (MIC) Architecture. The system came in at #150 on the Top500 and was cited as the third most power efficient design in the [...] Read more >

A busy ISC awaits us in Hamburg June 17-21, 2012. Please drop by and say hello if you will be there.  Here are some of the places I’ll be: Sunday helping Arch with his tutorial on Cilk Plus programming.  I’ll be fetching water, holding the door, whatever Arch needs. Monday at 6pm – here is [...] Read more >

Knights Corner: Open source software stack As mentioned in “Knights Corner micro-architecture support” the open source software stack consists of an embedded Linux, a minimally modified GCC, plus driver software. There is a package for GDB available separately as well. Links for these resources can be found at intel.com/software/mic in the article titled “RESOURCES (including downloads).” [...] Read more >

Knights Corner micro-architecture support How does a high performance SMP on-a-chip sound to you?  I can now share, for the first time, key details about our vision for Knights Corner (the aforementioned high performance SMP on-a-chip), and our thinking behind the software architecture and features.   There is a lot to cover here so I’ll cover it [...] Read more >

one presenter exclaimed “Time spent optimizing for MIC is time well spent because it optimizes your code for non-MIC processors at the same time.” Read more >

A couple of back-to-back opportunities to see great talks about harness lots of cores, and to give talks about programming options and why we do not need to give up on programmability in our quest for high performance. Wellington this week, Austin next week. Programming is not easy, and neither is parallel programming. Nevertheless, many [...] Read more >

Coarse-grained locks, and the importance of transactions, are key concepts that motivate why Intel Transactional Synchronization Extensions (TSX) is useful.  I’ll do my best to explain them in this blog. In my blog “Transactional Synchronization in Haswell,” I describe new instructions (Intel TSX) that will improve the performance of coarse-grained locks.  Understanding coarse-grained locks and [...] Read more >

We have released details of Intel® Transactional Synchronization Extensions (TSX) for the future multicore processor code-named “Haswell”. The updated specification (Intel® Architecture Instruction Set Extensions Programming Reference) can be downloaded. In this blog, I’ll introduce Intel TSX and provide a little background. Please refer to The Transactional Synchronization Extensions Chapter (Chapter 8) in the manual [...] Read more >

OPEN CASCADE S.A.S and Intel Corporation software teams decided to join their efforts to introduce parallel calculations into Salome SMESH Module. They developed with the help of Intel® Parallel Studio XE. They wrote an article about it which can be downloaded (for free) from Parallelism_in_SMESH.pdf   Read more >

HPCwire recognized Intel Parallel Studio XE, the same month we added even more to like with Intel Cluster Studio XE. Read more >

Proposal: rename for in C and C++ to serial_for No more incumbent “for.” (it was voted off the island) (let’s assume parallel_for == cilk_for in this discussion) Consider: serial_for (i=0; i < n; i++) { body } vs. parallel_for (int i=0; i < n; i++) { body } serial_for allows the values of n and i [...] Read more >